From patchwork Wed Aug 22 05:42:29 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Omar Ramirez Luna X-Patchwork-Id: 1359221 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 3DF17DFF0F for ; Wed, 22 Aug 2012 05:45:46 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T43iW-0003Rq-8o; Wed, 22 Aug 2012 05:43:00 +0000 Received: from mail-ob0-f177.google.com ([209.85.214.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T43iF-0003Ph-0J for linux-arm-kernel@lists.infradead.org; Wed, 22 Aug 2012 05:42:46 +0000 Received: by obbta17 with SMTP id ta17so908130obb.36 for ; Tue, 21 Aug 2012 22:42:42 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=Hy1FYyvU0tXlReISyK5zmRb43HEkDY11p6O1gFgdVj0=; b=en/nz7d3Lpl466a7jkW2hw+RXxBRZKyfxRGyftjd75HwsCWTwR1gkAcU4USA0hCCQA Foo5R9adeHc3n6UkDnWtlvRbbMTEqUk/eydPaCaki8yG7YS6Y5FiW/M0B/pSkVsoZycM ZTc0bGHz/yqAI+BOBl+HTR+oFvwvJZhs2icwoa0tRDh6VbsiCz49/YI2mpEesFQ6NebV l96aN/Jw6WrcyN/eZibJ5EOk5vEv3QCTqj+jcxksyxTyapwDVX+q9wK4Dz3igaYWGsNy acg4tVOUwVFLd3dLcrt/BF3GnpWi4WF4wKQq0DNpmv2bXov9ofuUAyd/pUJNxjprA+nC +vmg== Received: by 10.60.19.67 with SMTP id c3mr15269573oee.106.1345614162415; Tue, 21 Aug 2012 22:42:42 -0700 (PDT) Received: from uda0273944.am.dhcp.ti.com (dragon.ti.com. [192.94.94.33]) by mx.google.com with ESMTPS id a9sm3168240obp.14.2012.08.21.22.42.41 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 21 Aug 2012 22:42:41 -0700 (PDT) From: Omar Ramirez Luna To: Benoit Cousson , Paul Walmsley Subject: [PATCH 1/2] ARM: OMAP: hwmod: partially un-reset hwmods might not be properly enabled Date: Wed, 22 Aug 2012 00:42:29 -0500 Message-Id: <1345614150-25723-2-git-send-email-omar.luna@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1345614150-25723-1-git-send-email-omar.luna@linaro.org> References: <1345614150-25723-1-git-send-email-omar.luna@linaro.org> X-Gm-Message-State: ALoCoQkDyn/SrCHtPSyvNLjNvHLvnYyqCVE5SLYuttBzY6hPTBeVD8b+i5Eg74zHnkf9AS0c6uYq X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.214.177 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Kevin Hilman , Ohad Ben-Cohen , Russell King , Tony Lindgren , linux-kernel@vger.kernel.org, Tomi Valkeinen , Omar Ramirez Luna , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Some IP blocks might not be using/controlling more than one reset line, this check loosens the restriction to fully use hwmod framework for those drivers. E.g.: ipu has reset lines: mmu_cache, cpu0 and cpu1. - As of now cpu1 is not used and hence (with previous check) the IP block isn't fully enabled by hwmod code. - Usually ipu and dsp processors configure their mmu module first and then enable the processors, this involves: * Deasserting mmu reset line, and enabling the module. * Deasserting cpu0 reset line, and enabling the processor. The ones portrayed in this example are controlled through rproc_fw_boot in drivers/remoteproc/remoteproc_core.c While at it, prevent _omap4_module_disable if all the hardreset lines on an IP block are not under reset. This will allow the driver to: a. Deassert the reset line. b. Enable the hwmod through runtime PM default callbacks. c. Do its usecase. d. Disable hwmod through runtime PM. e. Assert the reset line. Signed-off-by: Omar Ramirez Luna --- arch/arm/mach-omap2/omap_hwmod.c | 37 ++++++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 6ca8e51..eaedc33 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1558,25 +1558,28 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name) } /** - * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset + * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset * @oh: struct omap_hwmod * * - * If any hardreset line associated with @oh is asserted, then return true. - * Otherwise, if @oh has no hardreset lines associated with it, or if - * no hardreset lines associated with @oh are asserted, then return false. + * If all hardreset lines associated with @oh are asserted, then return true. + * Otherwise, if part of @oh is out hardreset or if no hardreset lines + * associated with @oh are asserted, then return false. * This function is used to avoid executing some parts of the IP block - * enable/disable sequence if a hardreset line is set. + * enable/disable sequence if its hardreset line is set. */ -static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh) +static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh) { - int i; + int i, rst_cnt = 0; if (oh->rst_lines_cnt == 0) return false; for (i = 0; i < oh->rst_lines_cnt; i++) if (_read_hardreset(oh, oh->rst_lines[i].name) > 0) - return true; + rst_cnt++; + + if (oh->rst_lines_cnt == rst_cnt) + return true; return false; } @@ -1595,6 +1598,13 @@ static int _omap4_disable_module(struct omap_hwmod *oh) if (!oh->clkdm || !oh->prcm.omap4.modulemode) return -EINVAL; + /* + * Since integration code might still be doing something, only + * disable if all lines are under hardreset. + */ + if (!_are_all_hardreset_lines_asserted(oh)) + return 0; + pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__); omap4_cminst_module_disable(oh->clkdm->prcm_partition, @@ -1602,9 +1612,6 @@ static int _omap4_disable_module(struct omap_hwmod *oh) oh->clkdm->clkdm_offs, oh->prcm.omap4.clkctrl_offs); - if (_are_any_hardreset_lines_asserted(oh)) - return 0; - v = _omap4_wait_target_disable(oh); if (v) pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", @@ -1830,7 +1837,7 @@ static int _enable(struct omap_hwmod *oh) } /* - * If an IP block contains HW reset lines and any of them are + * If an IP block contains HW reset lines and all of them are * asserted, we let integration code associated with that * block handle the enable. We've received very little * information on what those driver authors need, and until @@ -1838,7 +1845,7 @@ static int _enable(struct omap_hwmod *oh) * posted to the public lists, this is probably the best we * can do. */ - if (_are_any_hardreset_lines_asserted(oh)) + if (_are_all_hardreset_lines_asserted(oh)) return 0; /* Mux pins for device runtime if populated */ @@ -1918,7 +1925,7 @@ static int _idle(struct omap_hwmod *oh) return -EINVAL; } - if (_are_any_hardreset_lines_asserted(oh)) + if (_are_all_hardreset_lines_asserted(oh)) return 0; if (oh->class->sysc) @@ -2006,7 +2013,7 @@ static int _shutdown(struct omap_hwmod *oh) return -EINVAL; } - if (_are_any_hardreset_lines_asserted(oh)) + if (_are_all_hardreset_lines_asserted(oh)) return 0; pr_debug("omap_hwmod: %s: disabling\n", oh->name);