From patchwork Wed Aug 29 07:40:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 1384181 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id DF45BDF215 for ; Wed, 29 Aug 2012 08:20:31 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T6dRl-00046o-NS; Wed, 29 Aug 2012 08:16:21 +0000 Received: from bombadil.infradead.org ([2001:4830:2446:ff00:4687:fcff:fea6:5117]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T6dRD-0003w8-V2 for linux-arm-kernel@merlin.infradead.org; Wed, 29 Aug 2012 08:15:48 +0000 Received: from metis.ext.pengutronix.de ([2001:6f8:1178:4:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T6ctR-0005wR-8P for linux-arm-kernel@lists.infradead.org; Wed, 29 Aug 2012 07:40:55 +0000 Received: from dude.hi.pengutronix.de ([2001:6f8:1178:2:21e:67ff:fe11:9c5c]) by metis.ext.pengutronix.de with esmtp (Exim 4.72) (envelope-from ) id 1T6csv-0004jm-R8; Wed, 29 Aug 2012 09:40:21 +0200 Received: from sha by dude.hi.pengutronix.de with local (Exim 4.80) (envelope-from ) id 1T6csu-0006jy-H6; Wed, 29 Aug 2012 09:40:20 +0200 From: Sascha Hauer To: linux-mtd@lists.infradead.org Subject: [PATCH 4/4] ARM i.MX5: Add nand oftree support Date: Wed, 29 Aug 2012 09:40:19 +0200 Message-Id: <1346226019-23560-5-git-send-email-s.hauer@pengutronix.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1346226019-23560-1-git-send-email-s.hauer@pengutronix.de> References: <1346226019-23560-1-git-send-email-s.hauer@pengutronix.de> X-SA-Exim-Connect-IP: 2001:6f8:1178:2:21e:67ff:fe11:9c5c X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20120829_034053_731511_B1E58C50 X-CRM114-Status: UNSURE ( 9.79 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.1 (--) X-Spam-Report: SpamAssassin version 3.3.2 on bombadil.infradead.org summary: Content analysis details: (-2.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.2 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Roland Stigge , Sascha Hauer , linux-arm-kernel@lists.infradead.org, Artem Bityutskiy X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This adds snippets to the i.MX51/53 devicetrees for the nand flash controller. Signed-off-by: Sascha Hauer Acked-by: Shawn Guo --- arch/arm/boot/dts/imx51.dtsi | 7 +++++++ arch/arm/boot/dts/imx53.dtsi | 7 +++++++ arch/arm/mach-imx/clk-imx51-imx53.c | 2 ++ 3 files changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index aba28dc..aaa0c0a 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -263,6 +263,13 @@ status = "disabled"; }; + nand@83fdb000 { + compatible = "fsl,imx51-nand"; + reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>; + interrupts = <8>; + status = "disabled"; + }; + ssi3: ssi@83fe8000 { compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; reg = <0x83fe8000 0x4000>; diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index cd37165..dc00c62 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -321,6 +321,13 @@ status = "disabled"; }; + nand@63fdb000 { + compatible = "fsl,imx53-nand"; + reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>; + interrupts = <8>; + status = "disabled"; + }; + ssi3: ssi@63fe8000 { compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; reg = <0x63fe8000 0x4000>; diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index 4bdcaa9..e81f17a 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -367,6 +367,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "83fcc000.ssi"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "70014000.ssi"); clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "83fe8000.ssi"); + clk_register_clkdev(clk[nfc_gate], NULL, "83fdb000.nand"); /* set the usboh3 parent to pll2_sw */ clk_set_parent(clk[usboh3_sel], clk[pll2_sw]); @@ -455,6 +456,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "63fcc000.ssi"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "50014000.ssi"); clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "63fd0000.ssi"); + clk_register_clkdev(clk[nfc_gate], NULL, "63fdb000.nand"); /* set SDHC root clock to 200MHZ*/ clk_set_rate(clk[esdhc_a_podf], 200000000);