From patchwork Fri Aug 31 08:02:47 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dirk Behme X-Patchwork-Id: 1391391 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id AC2AE3FC85 for ; Fri, 31 Aug 2012 08:06:49 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T7MCD-0007VL-Cg; Fri, 31 Aug 2012 08:03:17 +0000 Received: from smtp2-v.fe.bosch.de ([139.15.237.6]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T7MC4-0007V6-Sf for linux-arm-kernel@lists.infradead.org; Fri, 31 Aug 2012 08:03:14 +0000 Received: from vsmta14.fe.internet.bosch.com (unknown [10.4.98.54]) by imta23.fe.bosch.de (Postfix) with ESMTP id 5B70928C0220 for ; Fri, 31 Aug 2012 10:03:03 +0200 (CEST) Received: from localhost (vsgw2.fe.internet.bosch.com [10.4.98.13]) by vsmta14.fe.internet.bosch.com (Postfix) with SMTP id 517B71B407F8 for ; Fri, 31 Aug 2012 10:03:03 +0200 (CEST) Received: from SI-HUB1000.de.bosch.com (10.4.103.106) by si-hub03.de.bosch.com (10.3.144.92) with Microsoft SMTP Server (TLS) id 8.3.264.0; Fri, 31 Aug 2012 10:02:54 +0200 Received: from hi-z5661.hi.de.bosch.com (10.34.219.178) by SI-HUB1000.de.bosch.com (10.4.103.106) with Microsoft SMTP Server id 14.2.309.2; Fri, 31 Aug 2012 10:02:53 +0200 Received: from localhost.localdomain (localhost [127.0.0.1]) by hi-z5661.hi.de.bosch.com (Postfix) with ESMTP id 156BB4092C; Fri, 31 Aug 2012 10:02:53 +0200 (CEST) From: Dirk Behme To: , Subject: [PATCH v2 2/2] tty: serial: imx: don't reinit clock in imx_setup_ufcr() Date: Fri, 31 Aug 2012 10:02:47 +0200 Message-ID: <1346400167-24669-1-git-send-email-dirk.behme@de.bosch.com> X-Mailer: git-send-email 1.7.0.4 MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -6.9 (------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-6.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 KHOP_BIG_TO_CC Sent to 10+ recipients instaed of Bcc or a list -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [139.15.237.6 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Dirk Behme , Xinyu Chen , Greg Kroah-Hartman , Sascha Hauer , stable@vger.kernel.org, Troy Kisky , kernel@pengutronix.de, Shawn Guo , Alan Cox X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Remove the clock configuration from imx_setup_ufcr(). This isn't needed here and will cause garbage output if done. To be be sure that we only touch the bits we want (TXTL and RXTL) we have to mask out all other bits of the UFCR register. Add one non-existing bit macro for this, too (bit 6, DCEDTE on i.MX6). Signed-off-by: Dirk Behme CC: Shawn Guo CC: Sascha Hauer CC: Troy Kisky CC: Xinyu Chen CC: Acked-by: Shawn Guo --- Changes in v2: Instead of disabling imx_setup_ufcr() with an ifndef CONFIG_SERIAL_CORE_CONSOLE, remove the unneeded clock configuration from imx_setup_ufcr() itself as proposed by Troy Kisky. Note: If this patch is accepted, it should go to the same stable kernels as patch #1 of this series. So most probably 3.4 and 3.5. drivers/tty/serial/imx.c | 18 ++++-------------- 1 files changed, 4 insertions(+), 14 deletions(-) diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index 908178f..e309e8b 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -132,6 +132,7 @@ #define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */ #define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ #define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ +#define UFCR_DCEDTE (1<<6) /* DCE/DTE mode select */ #define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7) #define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */ @@ -667,22 +668,11 @@ static void imx_break_ctl(struct uart_port *port, int break_state) static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode) { unsigned int val; - unsigned int ufcr_rfdiv; - - /* set receiver / transmitter trigger level. - * RFDIV is set such way to satisfy requested uartclk value - */ - val = TXTL << 10 | RXTL; - ufcr_rfdiv = (clk_get_rate(sport->clk_per) + sport->port.uartclk / 2) - / sport->port.uartclk; - - if(!ufcr_rfdiv) - ufcr_rfdiv = 1; - - val |= UFCR_RFDIV_REG(ufcr_rfdiv); + /* set receiver / transmitter trigger level */ + val = readl(sport->port.membase + UFCR) & (UFCR_RFDIV | UFCR_DCEDTE); + val |= TXTL << UFCR_TXTL_SHF | RXTL; writel(val, sport->port.membase + UFCR); - return 0; }