From patchwork Mon Sep 10 15:23:45 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hunter, Jon" X-Patchwork-Id: 1432601 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id B528D4025E for ; Mon, 10 Sep 2012 15:29:04 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TB5rV-0006tJ-Mu; Mon, 10 Sep 2012 15:25:21 +0000 Received: from devils.ext.ti.com ([198.47.26.153]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TB5qC-0006N7-Cw for linux-arm-kernel@lists.infradead.org; Mon, 10 Sep 2012 15:24:04 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id q8AFNuvq009064; Mon, 10 Sep 2012 10:23:56 -0500 Received: from DLEE74.ent.ti.com (dlee74.ent.ti.com [157.170.170.8]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q8AFNuoV005861; Mon, 10 Sep 2012 10:23:56 -0500 Received: from dlelxv23.itg.ti.com (172.17.1.198) by DLEE74.ent.ti.com (157.170.170.8) with Microsoft SMTP Server id 14.1.323.3; Mon, 10 Sep 2012 10:23:55 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id q8AFNuXZ016262; Mon, 10 Sep 2012 10:23:56 -0500 Received: from localhost (h56-53.vpn.ti.com [172.24.56.53]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id q8AFNtr01005; Mon, 10 Sep 2012 10:23:55 -0500 (CDT) From: Jon Hunter To: Tony Lindgren Subject: [PATCH V3 7/8] ARM: OMAP4: Enable PMU for OMAP4460/70 Date: Mon, 10 Sep 2012 10:23:45 -0500 Message-ID: <1347290626-21164-8-git-send-email-jon-hunter@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1347290626-21164-1-git-send-email-jon-hunter@ti.com> References: <1347290626-21164-1-git-send-email-jon-hunter@ti.com> MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.3 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.153 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.4 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Kevin Hilman , Paul Walmsley , Benoit Cousson , Ming Lei , Will Deacon , Jon Hunter , linux-omap , linux-arm X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org OMAP4460 and OMAP4470 devices have dedicated PMU interrupts and so add these interrupts to the MPU HWMOD so we can use these for PMU events on these devices. The PMU interrupts need to be the first interrupts in the array of interrupts as the ARM PMU driver assumes this. By using these dedicated interrupts we only need to enable the MPU and DEBUG sub-systems for PMU to work. This is different to OMAP4430 that did not have dedicated interrupts and required other power domains in addition to the DEBUG sub-system to be enabled so we could route the PMU events to the CTI interrupts. Hence, OMAP4460 and OMAP4470 devices can use the same list of HWMODs to create the PMU device that is using by OMAP3. Cc: Ming Lei Cc: Will Deacon Cc: Benoit Cousson Cc: Paul Walmsley Cc: Kevin Hilman Signed-off-by: Jon Hunter --- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 ++ arch/arm/mach-omap2/pmu.c | 17 ++++++++--------- 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 7de8fbe..cdf0e05 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -2456,6 +2456,8 @@ static struct omap_hwmod_class omap44xx_mpu_hwmod_class = { /* mpu */ static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = { + { .name = "pmu0", .irq = 54 + OMAP44XX_IRQ_GIC_START }, + { .name = "pmu1", .irq = 55 + OMAP44XX_IRQ_GIC_START }, { .name = "pl310", .irq = 0 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } }; diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c index 5918098..7fbaa3f 100644 --- a/arch/arm/mach-omap2/pmu.c +++ b/arch/arm/mach-omap2/pmu.c @@ -118,7 +118,7 @@ static int __init omap4_init_cti(void) * * Uses OMAP HWMOD framework to create and register an ARM PMU device * from a list of HWMOD names passed. Currently supports OMAP2, OMAP3 - * and OMAP4430 devices. + * and OMAP4 devices. */ static int __init omap2_init_pmu(unsigned oh_num, char *oh_names[]) { @@ -163,14 +163,9 @@ static int __init omap_init_pmu(void) * OMAP24xx: mpu * OMAP3xxx: mpu, debugss * OMAP4430: l3_main_3, l3_instr, debugss + * OMAP4460/70: mpu, debugss */ - if (cpu_is_omap24xx()) { - oh_num = ARRAY_SIZE(omap2_pmu_oh_names); - oh_names = omap2_pmu_oh_names; - } else if (cpu_is_omap34xx()) { - oh_num = ARRAY_SIZE(omap3_pmu_oh_names); - oh_names = omap3_pmu_oh_names; - } else if (cpu_is_omap443x()) { + if (cpu_is_omap443x()) { r = omap4_init_cti(); if (r) return r; @@ -180,8 +175,12 @@ static int __init omap_init_pmu(void) omap_pmu_data.runtime_suspend = omap4_pmu_runtime_suspend; oh_num = ARRAY_SIZE(omap4430_pmu_oh_names); oh_names = omap4430_pmu_oh_names; + } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) { + oh_num = ARRAY_SIZE(omap3_pmu_oh_names); + oh_names = omap3_pmu_oh_names; } else { - return 0; + oh_num = ARRAY_SIZE(omap2_pmu_oh_names); + oh_names = omap2_pmu_oh_names; } return omap2_init_pmu(oh_num, oh_names);