From patchwork Thu Sep 13 23:31:26 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hunter, Jon" X-Patchwork-Id: 1454771 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (unknown [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id A65BF4025E for ; Thu, 13 Sep 2012 23:46:49 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TCItk-0002iO-5e; Thu, 13 Sep 2012 23:32:40 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TCIsw-0002bN-F1 for linux-arm-kernel@lists.infradead.org; Thu, 13 Sep 2012 23:31:53 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id q8DNVlwa022713; Thu, 13 Sep 2012 18:31:47 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q8DNVl4x002974; Thu, 13 Sep 2012 18:31:47 -0500 Received: from dlelxv24.itg.ti.com (172.17.1.199) by dfle73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.1.323.3; Thu, 13 Sep 2012 18:31:47 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlelxv24.itg.ti.com (8.13.8/8.13.8) with ESMTP id q8DNVl4T023510; Thu, 13 Sep 2012 18:31:47 -0500 Received: from localhost (ula0741266.am.dhcp.ti.com [192.157.144.139]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id q8DNVkw08226; Thu, 13 Sep 2012 18:31:46 -0500 (CDT) From: Jon Hunter To: Benoit Cousson , Tony Lindgren , Paul Walmsley , Rob Herring , Grant Likely Subject: [PATCH V2 2/7] ARM: OMAP3: Dynamically disable secure timer nodes for secure devices Date: Thu, 13 Sep 2012 18:31:26 -0500 Message-ID: <1347579091-3794-3-git-send-email-jon-hunter@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1347579091-3794-1-git-send-email-jon-hunter@ti.com> References: <1347579091-3794-1-git-send-email-jon-hunter@ti.com> MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.4 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.41 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: device-tree , linux-omap , Jon Hunter , linux-arm X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org OMAP3 devices may or may not have security features enabled. Security enabled devices are known as high-secure (HS) and devices without security are known as general purpose (GP). For OMAP3 devices there are 12 general purpose timers available. On secure devices the 12th timer is reserved for secure usage and so cannot be used by the kernel, where as for a GP device it is available. We can detect the OMAP device type, secure or GP, at runtime via an on-chip register. Today, when not using DT, we do not register the 12th timer as a linux device if the device is secure. When using device tree, device tree is going to register all the timer devices it finds in the device tree blob. To prevent device tree from registering 12th timer on a secure OMAP3 device we can add a status property to the timer binding with the value "disabled" at boot time. Note that timer 12 on a OMAP3 device has a property "ti,timer-secure" to indicate that it will not be available on a secure device and so for secure OMAP3 devices, we search for timers with this property and then disable them. Using the prom_add_property() function to dynamically add a property was a recommended approach suggested by Rob Herring [1]. I have tested this on an OMAP3 GP device and faking it to pretend to be a secure device to ensure that any timers marked with "ti,timer-secure" are not registered on boot. I have also made sure that all timers are registered as expected on a GP device by default. [1] http://comments.gmane.org/gmane.linux.ports.arm.omap/79203 Signed-off-by: Jon Hunter --- arch/arm/mach-omap2/board-generic.c | 1 + arch/arm/mach-omap2/common.h | 1 + arch/arm/mach-omap2/timer.c | 35 +++++++++++++++++++++++++++++++++++ 3 files changed, 37 insertions(+) diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 6f93a20..20124d7 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -40,6 +40,7 @@ static struct of_device_id omap_dt_match_table[] __initdata = { static void __init omap_generic_init(void) { omap_sdrc_init(NULL, NULL); + omap_dmtimer_init(); of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); } diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 1f65b18..d6a4875 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -326,6 +326,7 @@ extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1); struct omap2_hsmmc_info; extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers); +extern void omap_dmtimer_init(void); #endif /* __ASSEMBLER__ */ #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 31f9c93..60d43c8 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -136,6 +136,41 @@ static struct clock_event_device clockevent_gpt = { .set_mode = omap2_gp_timer_set_mode, }; +static struct property timer_disabled = { + .name = "status", + .length = sizeof("disabled"), + .value = "disabled", +}; + +static struct of_device_id omap_timer_match[] __initdata = { + { .compatible = "ti,omap2-timer", }, + { } +}; + +/** + * omap_dmtimer_init - initialisation function when device tree is used + * + * For secure OMAP3 devices, timers with device type "timer-secure" cannot + * be used by the kernel as they are reserved. Therefore, to prevent the + * kernel registering these devices remove them dynamically from the device + * tree on boot. + */ +void __init omap_dmtimer_init(void) +{ + struct device_node *np; + + if (!cpu_is_omap34xx()) + return; + + /* If we are a secure device, remove any secure timer nodes */ + if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) { + for_each_matching_node(np, omap_timer_match) { + if (of_get_property(np, "ti,timer-secure", NULL)) + prom_add_property(np, &timer_disabled); + } + } +} + static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, int gptimer_id, const char *fck_source)