From patchwork Fri Sep 14 21:34:45 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 1460631 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id C5CF6DF280 for ; Fri, 14 Sep 2012 21:39:34 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TCdYg-0008I4-CV; Fri, 14 Sep 2012 21:36:18 +0000 Received: from moutng.kundenserver.de ([212.227.17.8]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TCdXr-00088q-G1 for linux-arm-kernel@lists.infradead.org; Fri, 14 Sep 2012 21:35:31 +0000 Received: from localhost.localdomain (HSI-KBW-149-172-5-253.hsi13.kabel-badenwuerttemberg.de [149.172.5.253]) by mrelayeu.kundenserver.de (node=mrbap2) with ESMTP (Nemesis) id 0LfGuG-1TsHxO38qO-00pHrf; Fri, 14 Sep 2012 23:35:27 +0200 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 17/24] ARM: OMAP: use __iomem pointers for MMIO Date: Fri, 14 Sep 2012 23:34:45 +0200 Message-Id: <1347658492-11608-18-git-send-email-arnd@arndb.de> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1347658492-11608-1-git-send-email-arnd@arndb.de> References: <1347658492-11608-1-git-send-email-arnd@arndb.de> X-Provags-ID: V02:K0:QAYxnKFAJA1HkyW+yM3x3japnLJnjTfs0vOv+wN8IC8 WNFGk2BEgK5ZPz6Oj0TtqYxajagiFTVlX2ZKDq/cG3aYiXxDuw JI1buhRCEUY4fuOxmDT25T5uJvEav7GHUrNhHZFzUYj/pcFtAg yM1tLCQ2Iy5Ayuxlc1uc+Yu416cvRZXPDp23TDt8If73EaV2lN wtHSGR0odSp1XT81Fce6ipUdSooATNKR0MkQWslT8AbJyO7OkR BiM0II4SvuztKABSsoWFy+q4hc3kKJsBT0Futew4G6PbCTqcec i4+hThvLkW9DyD98bXR83JcGlAjT4nACj8aSGSHGt+UK11uF0G CjCJxSloW9LhCAKrCgjxtTutS0pYhfwDbg3FEwqywJmBh4h1VX PXXwalismgdpg== X-Spam-Note: CRM114 invocation failed X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [212.227.17.8 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Arnd Bergmann , Nicolas Pitre , Tony Lindgren , Will Deacon , linux-kernel@vger.kernel.org, Russell King X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org ARM is moving to stricter checks on readl/write functions, so we need to use the correct types everywhere. Cc: Tony Lindgren Signed-off-by: Arnd Bergmann --- arch/arm/plat-omap/include/plat/hardware.h | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h index ddbde38..2518f6c 100644 --- a/arch/arm/plat-omap/include/plat/hardware.h +++ b/arch/arm/plat-omap/include/plat/hardware.h @@ -56,9 +56,9 @@ * Timers * ---------------------------------------------------------------------------- */ -#define OMAP_MPU_TIMER1_BASE (0xfffec500) -#define OMAP_MPU_TIMER2_BASE (0xfffec600) -#define OMAP_MPU_TIMER3_BASE (0xfffec700) +#define OMAP_MPU_TIMER1_BASE IOMEM(0xfffec500) +#define OMAP_MPU_TIMER2_BASE IOMEM(0xfffec600) +#define OMAP_MPU_TIMER3_BASE IOMEM(0xfffec700) #define MPU_TIMER_FREE (1 << 6) #define MPU_TIMER_CLOCK_ENABLE (1 << 5) #define MPU_TIMER_AR (1 << 1) @@ -69,7 +69,7 @@ * Clocks * ---------------------------------------------------------------------------- */ -#define CLKGEN_REG_BASE (0xfffece00) +#define CLKGEN_REG_BASE IOMEM(0xfffece00) #define ARM_CKCTL (CLKGEN_REG_BASE + 0x0) #define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) #define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) @@ -86,7 +86,7 @@ #define SETARM_IDLE_SHIFT /* DPLL control registers */ -#define DPLL_CTL (0xfffecf00) +#define DPLL_CTL IOMEM(0xfffecf00) /* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ #define DSP_CONFIG_REG_BASE IOMEM(0xe1008000) @@ -100,7 +100,7 @@ * UPLD * --------------------------------------------------------------------------- */ -#define ULPD_REG_BASE (0xfffe0800) +#define ULPD_REG_BASE IOMEM(0xfffe0800) #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) @@ -131,7 +131,7 @@ */ /* Watchdog timer within the OMAP3.2 gigacell */ -#define OMAP_MPU_WATCHDOG_BASE (0xfffec800) +#define OMAP_MPU_WATCHDOG_BASE IOMEM(0xfffec800) #define OMAP_WDT_TIMER (OMAP_MPU_WATCHDOG_BASE + 0x0) #define OMAP_WDT_LOAD_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4) #define OMAP_WDT_READ_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4) @@ -149,8 +149,8 @@ * or something similar.. -- PFM. */ -#define OMAP_IH1_BASE 0xfffecb00 -#define OMAP_IH2_BASE 0xfffe0000 +#define OMAP_IH1_BASE IOMEM(0xfffecb00) +#define OMAP_IH2_BASE IOMEM(0xfffe0000) #define OMAP_IH1_ITR (OMAP_IH1_BASE + 0x00) #define OMAP_IH1_MIR (OMAP_IH1_BASE + 0x04)