From patchwork Wed Sep 19 16:04:26 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Harkin X-Patchwork-Id: 1478241 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 84940DF280 for ; Wed, 19 Sep 2012 16:07:21 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TEMlo-00013y-8z; Wed, 19 Sep 2012 16:05:00 +0000 Received: from woodbine.london.02.net ([87.194.255.145]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TEMlW-0000wP-Bq for linux-arm-kernel@lists.infradead.org; Wed, 19 Sep 2012 16:04:43 +0000 Received: from vaio (87.194.2.170) by woodbine.london.02.net (8.5.140) id 4FED9DF1024AD44B; Wed, 19 Sep 2012 17:04:27 +0100 Received: from ryan by vaio with local (Exim 4.76) (envelope-from ) id 1TEMlH-0002OU-42; Wed, 19 Sep 2012 17:04:27 +0100 From: Ryan Harkin To: ryan.harkin@linaro.org, arnd.bergmann@linaro.org, shiraz.hashim@st.com, stigge@antcom.de, pawel.moll@arm.com, tixy@linaro.org, liviu.dudau@arm.com, spear-devel@list.st.com, viresh.linux@gmail.com, linux-arm-kernel@lists.infradead.org, linux-fbdev@vger.kernel.org, devicetree-discuss@lists.ozlabs.org Subject: [RFC PATCH 3/3] ARM: vexpress: configure CLCD driver device tree support for A9 CoreTile Date: Wed, 19 Sep 2012 17:04:26 +0100 Message-Id: <1348070666-9153-4-git-send-email-ryan.harkin@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1348070666-9153-1-git-send-email-ryan.harkin@linaro.org> References: <1348070666-9153-1-git-send-email-ryan.harkin@linaro.org> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [87.194.255.145 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Configuration for the amba-clcd PL111 driver is added to the A9 CoreTile's DTS file. Configuration of the motherboard CLCD driver is removed from the DTSI files to prevent duplicate CLCD drivers being registered. A generic set of CLCD panel descriptions has been split into its own DTSI file. Currently, only XVGA and VGA monitors are described. Signed-off-by: Ryan Harkin Reviewed-by: Liviu Dudau --- arch/arm/boot/dts/clcd-panels.dtsi | 52 +++++++++++++++++++++++++++++++ arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 8 ++--- arch/arm/boot/dts/vexpress-v2m.dtsi | 8 ++--- arch/arm/boot/dts/vexpress-v2p-ca9.dts | 6 ++++ 4 files changed, 62 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/clcd-panels.dtsi b/arch/arm/boot/dts/clcd-panels.dtsi new file mode 100644 index 0000000..0b0ff6e --- /dev/null +++ b/arch/arm/boot/dts/clcd-panels.dtsi @@ -0,0 +1,52 @@ +/* + * ARM Ltd. Versatile Express + * + */ + +/ { + panels { + panel@0 { + compatible = "panel"; + mode = "VGA"; + refresh = <60>; + xres = <640>; + yres = <480>; + pixclock = <39721>; + left_margin = <40>; + right_margin = <24>; + upper_margin = <32>; + lower_margin = <11>; + hsync_len = <96>; + vsync_len = <2>; + sync = <0>; + vmode = "FB_VMODE_NONINTERLACED"; + + tim2 = "TIM2_BCD", "TIM2_IPC"; + cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)"; + caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888"; + bpp = <16>; + }; + + panel@1 { + compatible = "panel"; + mode = "XVGA"; + refresh = <60>; + xres = <1024>; + yres = <768>; + pixclock = <15748>; + left_margin = <152>; + right_margin = <48>; + upper_margin = <23>; + lower_margin = <3>; + hsync_len = <104>; + vsync_len = <4>; + sync = <0>; + vmode = "FB_VMODE_NONINTERLACED"; + + tim2 = "TIM2_BCD", "TIM2_IPC"; + cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)"; + caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888"; + bpp = <16>; + }; + }; +}; diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi index d8a827b..301d3f6 100644 --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi @@ -17,6 +17,8 @@ * CHANGES TO vexpress-v2m.dtsi! */ +/include/ "clcd-panels.dtsi" + / { aliases { arm,v2m_timer = &v2m_timer01; @@ -193,12 +195,6 @@ 0x1a0100 0xf00>; reg-shift = <2>; }; - - clcd@1f0000 { - compatible = "arm,pl111", "arm,primecell"; - reg = <0x1f0000 0x1000>; - interrupts = <14>; - }; }; v2m_fixed_3v3: fixedregulator@0 { diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi index dba53fd..43cd86f 100644 --- a/arch/arm/boot/dts/vexpress-v2m.dtsi +++ b/arch/arm/boot/dts/vexpress-v2m.dtsi @@ -17,6 +17,8 @@ * CHANGES TO vexpress-v2m-rs1.dtsi! */ +/include/ "clcd-panels.dtsi" + / { aliases { arm,v2m_timer = &v2m_timer01; @@ -192,12 +194,6 @@ 0x1a100 0xf00>; reg-shift = <2>; }; - - clcd@1f000 { - compatible = "arm,pl111", "arm,primecell"; - reg = <0x1f000 0x1000>; - interrupts = <14>; - }; }; v2m_fixed_3v3: fixedregulator@0 { diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts index 3f0c736..2ebb132 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts @@ -9,6 +9,8 @@ /dts-v1/; +/memreserve/ 0x9f000000 0x01000000; + / { model = "V2P-CA9"; arm,hbi = <0x191>; @@ -70,6 +72,10 @@ compatible = "arm,pl111", "arm,primecell"; reg = <0x10020000 0x1000>; interrupts = <0 44 4>; + mode = "XVGA"; + arm,vexpress-osc = <1>; + use_dma = <1>; + framebuffer = <0x9f000000 0x01000000>; }; memory-controller@100e0000 {