From patchwork Mon Sep 24 14:28:30 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 1498171 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 46AC0DF280 for ; Mon, 24 Sep 2012 14:33:03 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TG9fN-0005dU-Ja; Mon, 24 Sep 2012 14:29:46 +0000 Received: from mailout3.samsung.com ([203.254.224.33]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TG9ee-0005St-28 for linux-arm-kernel@lists.infradead.org; Mon, 24 Sep 2012 14:29:02 +0000 Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MAU00DW8YW756F0@mailout3.samsung.com> for linux-arm-kernel@lists.infradead.org; Mon, 24 Sep 2012 23:28:56 +0900 (KST) X-AuditID: cbfee61a-b7f726d000000ec7-c8-50606e27d688 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 2E.97.03783.72E60605; Mon, 24 Sep 2012 23:28:56 +0900 (KST) Received: from mcdsrvbld02.digital.local ([106.116.37.23]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MAU0018OYVOXC80@mmp1.samsung.com> for linux-arm-kernel@lists.infradead.org; Mon, 24 Sep 2012 23:28:55 +0900 (KST) From: Tomasz Figa To: linux-samsung-soc@vger.kernel.org Subject: [PATCH 3/6] ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412 Date: Mon, 24 Sep 2012 16:28:30 +0200 Message-id: <1348496913-25422-4-git-send-email-t.figa@samsung.com> X-Mailer: git-send-email 1.7.10 In-reply-to: <1348496913-25422-1-git-send-email-t.figa@samsung.com> References: <1348496913-25422-1-git-send-email-t.figa@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrAJMWRmVeSWpSXmKPExsVy+t9jAV2NvIQAg9OiFpseX2N1YPTYvKQ+ gDGKyyYlNSezLLVI3y6BK+PKmnlsBUtFK/Z/NWlgPCHYxcjJISFgInHs4zN2CFtM4sK99Wxd jFwcQgKLGCWe/HzFAuFsZpK4tmMqWBWbgJrE54ZHbCC2iICqxOe2BewgRcwChxklrq28yAqS EBaIkFgw5S4TiM0CVPT0Wi+YzSvgJHFmwxcWiHXyEk/v9wEN4uDgFHCW2HcqGCQsBFTSeGk6 4wRG3gWMDKsYRVMLkguKk9JzDfWKE3OLS/PS9ZLzczcxgv39TGoH48oGi0OMAhyMSjy8nOfj A4RYE8uKK3MPMUpwMCuJ8B5NTAgQ4k1JrKxKLcqPLyrNSS0+xCjNwaIkziv8KTBASCA9sSQ1 OzW1ILUIJsvEwSnVwFi0y9f9b+q7nQv/eD9fI19+SsHIMet0k++Kk6XX7s159zDb6anQl4ny LinbZ527L1PH/0I+cUPmqxO3Kh7Ep755+mn58hfZOXk2nE8Co66sNX0Zk3BiF5djbbSZ9rOp Nxo0/9fxuIqe1rqx/lyLsn6nh8zzZvnlsS3+VU/Frpof1TMz7eDaKK7EUpyRaKjFXFScCAD0 xWMr8wEAAA== X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.7 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.33 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.8 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: kgene.kim@samsung.com, linux@arm.linux.org.uk, arnd@arndb.de, t.figa@samsung.com, kyungmin.park@samsung.com, olof@lixom.net, linux-arm-kernel@lists.infradead.org, m.szyprowski@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Exynos4412 uses different information register for each core. This patch adjusts the bring-up code to take that into account. Signed-off-by: Tomasz Figa --- arch/arm/mach-exynos/platsmp.c | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 36c3984..a7f4031 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -34,8 +34,21 @@ extern void exynos4_secondary_startup(void); -#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \ - S5P_INFORM5 : S5P_VA_SYSRAM) +static inline void __iomem *cpu_boot_reg_base(void) +{ + if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1) + return S5P_INFORM5; + return S5P_VA_SYSRAM; +} + +static inline void __iomem *cpu_boot_reg(int cpu) +{ + void __iomem *boot_reg; + boot_reg = cpu_boot_reg_base(); + if (soc_is_exynos4412()) + boot_reg += 4*cpu; + return boot_reg; +} /* * control for which core is the next to come out of the secondary @@ -89,6 +102,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) { unsigned long timeout; + unsigned long phys_cpu = cpu_logical_map(cpu); /* * Set synchronisation state between this boot processor @@ -104,7 +118,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) * Note that "pen_release" is the hardware CPU ID, whereas * "cpu" is Linux's internal ID. */ - write_pen_release(cpu_logical_map(cpu)); + write_pen_release(phys_cpu); if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) { __raw_writel(S5P_CORE_LOCAL_PWR_EN, @@ -138,7 +152,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) smp_rmb(); __raw_writel(virt_to_phys(exynos4_secondary_startup), - CPU1_BOOT_REG); + cpu_boot_reg(phys_cpu)); gic_raise_softirq(cpumask_of(cpu), 1); if (pen_release == -1) @@ -186,6 +200,8 @@ void __init smp_init_cpus(void) void __init platform_smp_prepare_cpus(unsigned int max_cpus) { + int i; + if (!soc_is_exynos5250()) scu_enable(scu_base_addr()); @@ -195,6 +211,7 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus) * until it receives a soft interrupt, and then the * secondary CPU branches to this address. */ - __raw_writel(virt_to_phys(exynos4_secondary_startup), - CPU1_BOOT_REG); + for (i = 1; i < max_cpus; ++i) + __raw_writel(virt_to_phys(exynos4_secondary_startup), + cpu_boot_reg(cpu_logical_map(i))); }