From patchwork Mon Oct 15 21:51:30 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anton Vorontsov X-Patchwork-Id: 1596961 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 46CECDFB34 for ; Mon, 15 Oct 2012 21:58:12 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TNsdq-0000M1-Ks; Mon, 15 Oct 2012 21:56:07 +0000 Received: from mail-pa0-f49.google.com ([209.85.220.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TNscj-0008HX-Tr for linux-arm-kernel@lists.infradead.org; Mon, 15 Oct 2012 21:54:59 +0000 Received: by mail-pa0-f49.google.com with SMTP id bi5so5498790pad.36 for ; Mon, 15 Oct 2012 14:54:57 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=N1fPpqQPt3sSkCEgFmJHNvD3nr7viXLto6rOVORc7yo=; b=NfIH+Hf0NAUGjQgsVqc98PtBdBz5RvZdRXONMm8O7dIYyP5nTp2dZOi75Y29xQq6ya MWs9azqvtlsGU3t5v5M6j3RoT0s3A+y4c9h8nwBT6+8RuCqoQEGnv6LA0ANphO6vcf0K X3y3WcxgnJrMJfgmdDz26aej+S01mGnNg/Y5iedyQLmKWxd/7Qcq4p8zcD+2WD48V812 KHJZsVeKt+xoFUYo5Sb3nHL5SrWYDkuIa863Z75pl/i5ErT+QMf/1xtgb3suSZNeFJFt QjFOFt50L3myTPK19VQ/Ne8y1Iob+K+AhQABydlzYqSCjw42SY9RlzRmNGfHt85eNJFX pTOw== Received: by 10.68.217.104 with SMTP id ox8mr40840866pbc.35.1350338097423; Mon, 15 Oct 2012 14:54:57 -0700 (PDT) Received: from localhost (ip-64-134-230-8.public.wayport.net. [64.134.230.8]) by mx.google.com with ESMTPS id c1sm9662231pay.19.2012.10.15.14.54.56 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 15 Oct 2012 14:54:56 -0700 (PDT) From: Anton Vorontsov To: Russell King Subject: [PATCH 06/10] ARM: FIQ: Remove FIQ_START Date: Mon, 15 Oct 2012 14:51:30 -0700 Message-Id: <1350337894-9744-6-git-send-email-anton.vorontsov@linaro.org> X-Mailer: git-send-email 1.7.12.3 In-Reply-To: <20121015214954.GA3352@lizard> References: <20121015214954.GA3352@lizard> X-Gm-Message-State: ALoCoQnPPMyMA85TakOCyJxw7k7/nM6bGb4ft/RcGPhVbTkd6mUUfmw/HtDbblGjdxrm/Uu/CVXs X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linaro-kernel@lists.linaro.org, Sascha Hauer , patches@linaro.org, Tony Lindgren , Mark Brown , linux-kernel@vger.kernel.org, Kukjin Kim , John Stultz , Ben Dooks , kernel-team@android.com, Liam Girdwood , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org RPC: FIQ_START is irrelevant nowadays, the arch uses platform-specific iomd_{,un}mask_fiq() calls. OMAP1: The only user of FIQs is MACH_AMS_DELTA, and in particular its drivers/input/serio/ams_delta_serio.c driver. The driver does not rely on the FIQ interrupts directly, instead it uses a "deferred fiq" interrupt (raised after a buffer filled by the FIQ routine). The FIQ handling routines are not using disable_fiq() or enable_fiq() stuff, so it currently does not use FIQ_START at all -- the asm code uses OMAP_IH1_BASE and twiddles the bits itself. S3C: The only user of FIQs on s3c24xx is spi-s3c24xx driver. The driver works with interrupt controller directly (via S3C24XX_VA_IRQ base address), and does not use IRQ subsystem to mask/unmask IRQs. MXC: Users now use enable/disable_irq() routines. The drivers rely on a correctly passed VIRQ cookie anyway, so FIQ_START becomes irrelevant. Signed-off-by: Anton Vorontsov --- arch/arm/include/asm/mach/irq.h | 2 +- arch/arm/kernel/fiq.c | 2 +- arch/arm/mach-omap1/include/mach/irqs.h | 4 ---- arch/arm/mach-rpc/include/mach/irqs.h | 5 ----- arch/arm/mach-rpc/irq.c | 2 +- arch/arm/mach-s3c24xx/include/mach/irqs.h | 3 --- arch/arm/plat-mxc/avic.c | 2 +- arch/arm/plat-mxc/include/mach/irqs.h | 2 -- arch/arm/plat-mxc/tzic.c | 2 +- arch/arm/plat-s3c24xx/irq.c | 2 +- 10 files changed, 6 insertions(+), 20 deletions(-) diff --git a/arch/arm/include/asm/mach/irq.h b/arch/arm/include/asm/mach/irq.h index 15cb035..febe495 100644 --- a/arch/arm/include/asm/mach/irq.h +++ b/arch/arm/include/asm/mach/irq.h @@ -17,7 +17,7 @@ struct seq_file; /* * This is internal. Do not use it. */ -extern void init_FIQ(int); +extern void init_FIQ(void); extern int show_fiq_list(struct seq_file *, int); #ifdef CONFIG_MULTI_IRQ_HANDLER diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c index 29b93b8..bd369c5 100644 --- a/arch/arm/kernel/fiq.c +++ b/arch/arm/kernel/fiq.c @@ -128,7 +128,7 @@ EXPORT_SYMBOL(__get_fiq_regs); /* defined in fiqasm.S */ EXPORT_SYMBOL(claim_fiq); EXPORT_SYMBOL(release_fiq); -void __init init_FIQ(int start) +void __init init_FIQ(void) { no_fiq_insn = *(unsigned long *)0xffff001c; } diff --git a/arch/arm/mach-omap1/include/mach/irqs.h b/arch/arm/mach-omap1/include/mach/irqs.h index 729992d..f254bb6 100644 --- a/arch/arm/mach-omap1/include/mach/irqs.h +++ b/arch/arm/mach-omap1/include/mach/irqs.h @@ -261,8 +261,4 @@ #include -#ifdef CONFIG_FIQ -#define FIQ_START 1024 -#endif - #endif diff --git a/arch/arm/mach-rpc/include/mach/irqs.h b/arch/arm/mach-rpc/include/mach/irqs.h index f27ead1..2536543 100644 --- a/arch/arm/mach-rpc/include/mach/irqs.h +++ b/arch/arm/mach-rpc/include/mach/irqs.h @@ -42,9 +42,4 @@ extern void iomd_mask_fiq(int fiq); extern void iomd_unmask_fiq(int fiq); #endif -/* - * This is the offset of the FIQ "IRQ" numbers - */ -#define FIQ_START 64 - #define NR_IRQS 128 diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c index a4221b3..07770c8 100644 --- a/arch/arm/mach-rpc/irq.c +++ b/arch/arm/mach-rpc/irq.c @@ -152,6 +152,6 @@ void __init rpc_init_irq(void) } } - init_FIQ(FIQ_START); + init_FIQ(); } diff --git a/arch/arm/mach-s3c24xx/include/mach/irqs.h b/arch/arm/mach-s3c24xx/include/mach/irqs.h index b7a9f4d..7d66d41 100644 --- a/arch/arm/mach-s3c24xx/include/mach/irqs.h +++ b/arch/arm/mach-s3c24xx/include/mach/irqs.h @@ -209,7 +209,4 @@ #define IRQ_S3C244X_AC97 IRQ_S3C2443_AC97 #endif -/* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */ -#define FIQ_START IRQ_EINT0 - #endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index cbd55c3..19701ec 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c @@ -218,7 +218,7 @@ void __init mxc_init_irq(void __iomem *irqbase) #ifdef CONFIG_FIQ /* Initialize FIQ */ - init_FIQ(FIQ_START); + init_FIQ(); #endif printk(KERN_INFO "MXC IRQ initialized\n"); diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index d73f5e8..2ec942f 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h @@ -13,8 +13,6 @@ extern int imx_irq_set_priority(unsigned char irq, unsigned char prio); -/* all normal IRQs can be FIQs */ -#define FIQ_START 0 /* switch between IRQ and FIQ */ extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index 3ed1adb..d09b573 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c @@ -193,7 +193,7 @@ void __init tzic_init_irq(void __iomem *irqbase) #ifdef CONFIG_FIQ /* Initialize FIQ */ - init_FIQ(FIQ_START); + init_FIQ(); #endif pr_info("TrustZone Interrupt Controller (TZIC) initialized\n"); diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index e4e9567..e0de92a 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c @@ -533,7 +533,7 @@ void __init s3c24xx_init_irq(void) int i; #ifdef CONFIG_FIQ - init_FIQ(FIQ_START); + init_FIQ(); #endif irqdbf("s3c2410_init_irq: clearing interrupt status flags\n");