From patchwork Tue Oct 23 08:37:09 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastien Guiriec X-Patchwork-Id: 1629421 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id D118F3FCF7 for ; Tue, 23 Oct 2012 08:40:03 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TQZzV-0003QX-Sv; Tue, 23 Oct 2012 08:37:38 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TQZzD-0003LM-IF for linux-arm-kernel@lists.infradead.org; Tue, 23 Oct 2012 08:37:20 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id q9N8bHgo012966; Tue, 23 Oct 2012 03:37:17 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9N8bHqH007040; Tue, 23 Oct 2012 03:37:17 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by dfle72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.1.323.3; Tue, 23 Oct 2012 03:37:17 -0500 Received: from unb0919150.emea.dhcp.ti.com (unb0919150.emea.dhcp.ti.com [137.167.111.10]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9N8bE5a025799; Tue, 23 Oct 2012 03:37:16 -0500 From: Sebastien Guiriec To: Sebastien Guiriec , Tony Lindgren , Benoit Cousson Subject: [PATCH v2 1/4] ARM: dts: omap5: Update GPIO with address space and interrupts Date: Tue, 23 Oct 2012 10:37:09 +0200 Message-ID: <1350981432-6750-2-git-send-email-s-guiriec@ti.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1350981432-6750-1-git-send-email-s-guiriec@ti.com> References: <1350981432-6750-1-git-send-email-s-guiriec@ti.com> MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.41 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: devicetree-discuss@lists.ozlabs.org, linux-omap@vger.kernel.org, Santosh Shilimkar , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add base address and interrupt line inside Device Tree data for OMAP5 Signed-off-by: Sebastien Guiriec --- arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 42c78be..9e39f9f 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -104,6 +104,8 @@ gpio1: gpio@4ae10000 { compatible = "ti,omap4-gpio"; + reg = <0x4ae10000 0x200>; + interrupts = <0 29 0x4>; ti,hwmods = "gpio1"; gpio-controller; #gpio-cells = <2>; @@ -113,6 +115,8 @@ gpio2: gpio@48055000 { compatible = "ti,omap4-gpio"; + reg = <0x48055000 0x200>; + interrupts = <0 30 0x4>; ti,hwmods = "gpio2"; gpio-controller; #gpio-cells = <2>; @@ -122,6 +126,8 @@ gpio3: gpio@48057000 { compatible = "ti,omap4-gpio"; + reg = <0x48057000 0x200>; + interrupts = <0 31 0x4>; ti,hwmods = "gpio3"; gpio-controller; #gpio-cells = <2>; @@ -131,6 +137,8 @@ gpio4: gpio@48059000 { compatible = "ti,omap4-gpio"; + reg = <0x48059000 0x200>; + interrupts = <0 32 0x4>; ti,hwmods = "gpio4"; gpio-controller; #gpio-cells = <2>; @@ -140,6 +148,8 @@ gpio5: gpio@4805b000 { compatible = "ti,omap4-gpio"; + reg = <0x4805b000 0x200>; + interrupts = <0 33 0x4>; ti,hwmods = "gpio5"; gpio-controller; #gpio-cells = <2>; @@ -149,6 +159,8 @@ gpio6: gpio@4805d000 { compatible = "ti,omap4-gpio"; + reg = <0x4805d000 0x200>; + interrupts = <0 34 0x4>; ti,hwmods = "gpio6"; gpio-controller; #gpio-cells = <2>; @@ -158,6 +170,8 @@ gpio7: gpio@48051000 { compatible = "ti,omap4-gpio"; + reg = <0x48051000 0x200>; + interrupts = <0 35 0x4>; ti,hwmods = "gpio7"; gpio-controller; #gpio-cells = <2>; @@ -167,6 +181,8 @@ gpio8: gpio@48053000 { compatible = "ti,omap4-gpio"; + reg = <0x48053000 0x200>; + interrupts = <0 121 0x4>; ti,hwmods = "gpio8"; gpio-controller; #gpio-cells = <2>;