From patchwork Wed Oct 24 07:07:12 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastien Guiriec X-Patchwork-Id: 1636201 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id C14623FC36 for ; Wed, 24 Oct 2012 07:09:34 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TQv4K-00089j-50; Wed, 24 Oct 2012 07:08:00 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TQv3m-00085H-LB for linux-arm-kernel@lists.infradead.org; Wed, 24 Oct 2012 07:07:28 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id q9O77Nut025001; Wed, 24 Oct 2012 02:07:23 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9O77NgZ026031; Wed, 24 Oct 2012 02:07:23 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by dfle73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.1.323.3; Wed, 24 Oct 2012 02:07:23 -0500 Received: from unb0919150.emea.dhcp.ti.com (unb0919150.emea.dhcp.ti.com [137.167.111.10]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9O77IVq023400; Wed, 24 Oct 2012 02:07:21 -0500 From: Sebastien Guiriec To: Sebastien Guiriec , Tony Lindgren , Benoit Cousson Subject: [PATCH v3 2/4] ARM: dts: omap5: Update I2C with address space and interrupts Date: Wed, 24 Oct 2012 09:07:12 +0200 Message-ID: <1351062434-22514-3-git-send-email-s-guiriec@ti.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1351062434-22514-1-git-send-email-s-guiriec@ti.com> References: <1351062434-22514-1-git-send-email-s-guiriec@ti.com> MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.40 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: devicetree-discuss@lists.ozlabs.org, linux-omap@vger.kernel.org, Santosh Shilimkar , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add base address and interrupt line inside Device Tree data for OMAP5 Signed-off-by: Sebastien Guiriec Reviewed-by: Shubhrajyoti D --- arch/arm/boot/dts/omap5.dtsi | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 737a536..07d2607 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -200,6 +200,9 @@ i2c1: i2c@48070000 { compatible = "ti,omap4-i2c"; + reg = <0x48070000 0x100>; + interrupts = <0 56 0x4>; + interrupt-parent = <&gic>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c1"; @@ -207,6 +210,9 @@ i2c2: i2c@48072000 { compatible = "ti,omap4-i2c"; + reg = <0x48072000 0x100>; + interrupts = <0 57 0x4>; + interrupt-parent = <&gic>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c2"; @@ -214,20 +220,29 @@ i2c3: i2c@48060000 { compatible = "ti,omap4-i2c"; + reg = <0x48060000 0x100>; + interrupts = <0 61 0x4>; + interrupt-parent = <&gic>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c3"; }; - i2c4: i2c@4807A000 { + i2c4: i2c@4807a000 { compatible = "ti,omap4-i2c"; + reg = <0x4807a000 0x100>; + interrupts = <0 62 0x4>; + interrupt-parent = <&gic>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c4"; }; - i2c5: i2c@4807C000 { + i2c5: i2c@4807c000 { compatible = "ti,omap4-i2c"; + reg = <0x4807c000 0x100>; + interrupts = <0 60 0x4>; + interrupt-parent = <&gic>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c5";