From patchwork Wed Oct 24 07:07:14 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastien Guiriec X-Patchwork-Id: 1636221 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 2CD26DF2AB for ; Wed, 24 Oct 2012 07:09:51 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TQv4Y-0008Dw-7H; Wed, 24 Oct 2012 07:08:16 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TQv3n-00085x-Jk for linux-arm-kernel@lists.infradead.org; Wed, 24 Oct 2012 07:07:28 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id q9O77QOS025004; Wed, 24 Oct 2012 02:07:26 -0500 Received: from DLEE74.ent.ti.com (dlee74.ent.ti.com [157.170.170.8]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9O77QVX026054; Wed, 24 Oct 2012 02:07:26 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE74.ent.ti.com (157.170.170.8) with Microsoft SMTP Server id 14.1.323.3; Wed, 24 Oct 2012 02:07:26 -0500 Received: from unb0919150.emea.dhcp.ti.com (unb0919150.emea.dhcp.ti.com [137.167.111.10]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9O77IVs023400; Wed, 24 Oct 2012 02:07:25 -0500 From: Sebastien Guiriec To: Sebastien Guiriec , Tony Lindgren , Benoit Cousson Subject: [PATCH v3 4/4] ARM: dts: omap5: Update MMC with address space and interrupts Date: Wed, 24 Oct 2012 09:07:14 +0200 Message-ID: <1351062434-22514-5-git-send-email-s-guiriec@ti.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1351062434-22514-1-git-send-email-s-guiriec@ti.com> References: <1351062434-22514-1-git-send-email-s-guiriec@ti.com> MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.40 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: devicetree-discuss@lists.ozlabs.org, linux-omap@vger.kernel.org, Santosh Shilimkar , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add base address and interrupt line inside Device Tree data for OMAP5. Signed-off-by: Sebastien Guiriec --- arch/arm/boot/dts/omap5.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index b535d8e..304dd8d 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -304,6 +304,9 @@ mmc1: mmc@4809c000 { compatible = "ti,omap4-hsmmc"; + reg = <0x4809c000 0x400>; + interrupts = <0 83 0x4>; + interrupt-parent = <&gic>; ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; @@ -311,24 +314,36 @@ mmc2: mmc@480b4000 { compatible = "ti,omap4-hsmmc"; + reg = <0x480b4000 0x400>; + interrupts = <0 86 0x4>; + interrupt-parent = <&gic>; ti,hwmods = "mmc2"; ti,needs-special-reset; }; mmc3: mmc@480ad000 { compatible = "ti,omap4-hsmmc"; + reg = <0x480ad000 0x400>; + interrupts = <0 94 0x4>; + interrupt-parent = <&gic>; ti,hwmods = "mmc3"; ti,needs-special-reset; }; mmc4: mmc@480d1000 { compatible = "ti,omap4-hsmmc"; + reg = <0x480d1000 0x400>; + interrupts = <0 96 0x4>; + interrupt-parent = <&gic>; ti,hwmods = "mmc4"; ti,needs-special-reset; }; mmc5: mmc@480d5000 { compatible = "ti,omap4-hsmmc"; + reg = <0x480d5000 0x400>; + interrupts = <0 59 0x4>; + interrupt-parent = <&gic>; ti,hwmods = "mmc5"; ti,needs-special-reset; };