From patchwork Fri Oct 26 17:55:49 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kim Kukjin X-Patchwork-Id: 1653061 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 4FDD3DF2F6 for ; Fri, 26 Oct 2012 17:58:48 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TRo9R-0001J5-Cc; Fri, 26 Oct 2012 17:56:57 +0000 Received: from mail-pa0-f49.google.com ([209.85.220.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TRo8w-00015Y-Fz for linux-arm-kernel@lists.infradead.org; Fri, 26 Oct 2012 17:56:27 +0000 Received: by mail-pa0-f49.google.com with SMTP id bi5so1929184pad.36 for ; Fri, 26 Oct 2012 10:56:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=KC32bQsv29azgFhJyfPKYNqiDHUFPMa0IBO/2YX57HY=; b=m4co8d+uSsYWdnKgFILB/92Syx1/dXxdvRggQeWnGQM5K34FCpgPOLwR3fmejIpSCr /Hb/kOG4dFn+HDg8iMMiLYKhT+44lu6RHhi/11mruJM2xmlW3+wekE/fcZU5cyvtwKXs KvjVBXkG2a1tH4Luvpg+RJoFIKm9RT4FN1uHpqxeaY+V8dGJasQF46gJqi+WVOUJEgDl Hvm5+VhL4Nos/qRLrm7hpjvlOPIA6xdhf4laDSfB6gM+2EQGAuXzVor+fZ8iRqEreIVX NKTw+QhHntEG1wc3L9xckfPe8mssrnHX9kD0a62LhjJ/XSb0ThI3CnPOdB1FUYl/G0vL pZkA== Received: by 10.66.75.162 with SMTP id d2mr63789079paw.27.1351274186230; Fri, 26 Oct 2012 10:56:26 -0700 (PDT) Received: from localhost.localdomain ([121.136.168.198]) by mx.google.com with ESMTPS id po4sm1497143pbb.13.2012.10.26.10.56.17 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 26 Oct 2012 10:56:23 -0700 (PDT) From: Kukjin Kim To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 2/7] clk: exynos5440: add common clock support for Samsung EXYNOS5440 Date: Sat, 27 Oct 2012 02:55:49 +0900 Message-Id: <1351274153-3120-3-git-send-email-kgene.kim@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1351274153-3120-1-git-send-email-kgene.kim@samsung.com> References: <1351274153-3120-1-git-send-email-kgene.kim@samsung.com> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -1.8 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.8 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.8 RCVD_IN_SORBS_WEB RBL: SORBS: sender is an abusable web server [121.136.168.198 listed in dnsbl.sorbs.net] -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.49 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (kgene.kim[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Mike Turquette , Kukjin Kim , Thomas Abraham X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Thomas Abraham This patch adds clock controller configuration support based on common clock framework for Samsung EXYNOS5440. Signed-off-by: Thomas Abraham Cc: Mike Turquette Signed-off-by: Kukjin Kim --- drivers/clk/samsung/Makefile | 1 + drivers/clk/samsung/clk-exynos5440.c | 66 ++++++++++++++++++++++++++++++++++ 2 files changed, 67 insertions(+), 0 deletions(-) create mode 100644 drivers/clk/samsung/clk-exynos5440.c diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile index 69487f7..27aab2c 100644 --- a/drivers/clk/samsung/Makefile +++ b/drivers/clk/samsung/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_PLAT_SAMSUNG) += clk.o obj-$(CONFIG_ARCH_EXYNOS4) += clk-exynos4.o +obj-$(CONFIG_SOC_EXYNOS5440) += clk-exynos5440.o diff --git a/drivers/clk/samsung/clk-exynos5440.c b/drivers/clk/samsung/clk-exynos5440.c new file mode 100644 index 0000000..da3b918 --- /dev/null +++ b/drivers/clk/samsung/clk-exynos5440.c @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include +#include +#include +#include + +#include "clk.h" + +static void __iomem *clk_base; + +/* register a fixed factor clock type instantiated from device tree */ +void __init samsung_of_clk_register_fixed_factor(struct device_node *np) +{ + struct clk *clk; + const char *clk_name = np->name; + const char *parent_name; + u32 mul = 1, div = 1; + + of_property_read_string(np, "clock-output-names", &clk_name); + parent_name = of_clk_get_parent_name(np, 0); + of_property_read_u32(np, "clock-fixed-factor-mul", &mul); + of_property_read_u32(np, "clock-fixed-factor-div", &div); + + clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0, + mul, div); + if (clk) + of_clk_add_provider(np, of_clk_src_simple_get, clk); +} + +static const __initconst struct of_device_id clk_match[] = { + { .compatible = "fixed-clock", + .data = of_fixed_clk_setup, }, + { .compatible = "samsung,clock-gate", + .data = samsung_of_clk_register_gate, }, + { .compatible = "samsung,fixed-factor-clock", + .data = samsung_of_clk_register_fixed_factor, }, + {}, +}; + +void __init exynos5440_of_clk_init(void) +{ + struct device_node *np; + + np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-xmu"); + if (!np) { + pr_err("%s: clock controller node not found\n", __func__); + return; + } + + clk_base = of_iomap(np, 0); + WARN(!clk_base, "unable to map clocks registers\n"); + + samsung_clk_set_ctrl_base(clk_base); + of_clk_init(clk_match); +} + +arch_initcall(exynos5440_of_clk_init);