| Message ID | 1352182726-29221-1-git-send-email-a.kesavan@samsung.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 6 November 2012 11:48, Abhilash Kesavan <a.kesavan@samsung.com> wrote: > On Exynos5 we have a new high-speed i2c controller. The interrupt > sources for the legacy and new controller are muxed and are controlled > via the SYSCON I2C_CFG register. > At reset the interrupt source is configured for the high-speed controller, > to continue using the old i2c controller we need to modify the I2C_CFG > register. If the high-speed i2c controllers are not used, can this configuration be moved into the bootloader? The other option could be, in the exynos5250_dt_machine_init() function, first check if the platform is compatible with "samsung,exynos5250" and if so search for a high-speed i2c controller compatible node. If a high-speed controller node is found and if that node is not disabled, then do not change the reset value of I2C_CFG register. Thanks, Thomas. > > Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> > --- > This is a hack, I am not quite clear on how to handle this via DT. Suggestions > welcome. > > arch/arm/mach-exynos/mach-exynos5-dt.c | 10 ++++++++++ > 1 files changed, 10 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c > index ed37273..badffd4 100644 > --- a/arch/arm/mach-exynos/mach-exynos5-dt.c > +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c > @@ -13,10 +13,12 @@ > #include <linux/serial_core.h> > #include <linux/memblock.h> > #include <linux/of_fdt.h> > +#include <linux/io.h> > > #include <asm/mach/arch.h> > #include <asm/hardware/gic.h> > #include <mach/map.h> > +#include <mach/regs-pmu.h> > > #include <plat/cpu.h> > #include <plat/regs-serial.h> > @@ -89,6 +91,12 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { > {}, > }; > > +static void exynos5_i2c_setup(void) > +{ > + /* Setup the low-speed i2c controller interrupts */ > + writel(0x0, EXYNOS5_SYS_I2C_CFG); > +} > + > static void __init exynos5250_dt_map_io(void) > { > exynos_init_io(NULL, 0); > @@ -97,6 +105,8 @@ static void __init exynos5250_dt_map_io(void) > > static void __init exynos5250_dt_machine_init(void) > { > + exynos5_i2c_setup(); > + > of_platform_populate(NULL, of_default_bus_match_table, > exynos5250_auxdata_lookup, NULL); > } > -- > 1.6.6.1 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Hi Thomas, Thanks for the suggestions. On Tue, Nov 6, 2012 at 1:45 PM, Thomas Abraham <thomas.abraham@linaro.org> wrote: > On 6 November 2012 11:48, Abhilash Kesavan <a.kesavan@samsung.com> wrote: >> On Exynos5 we have a new high-speed i2c controller. The interrupt >> sources for the legacy and new controller are muxed and are controlled >> via the SYSCON I2C_CFG register. >> At reset the interrupt source is configured for the high-speed controller, >> to continue using the old i2c controller we need to modify the I2C_CFG >> register. > > If the high-speed i2c controllers are not used, can this configuration > be moved into the bootloader? > > The other option could be, in the exynos5250_dt_machine_init() > function, first check if the platform is compatible with > "samsung,exynos5250" and if so search for a high-speed i2c controller > compatible node. If a high-speed controller node is found and if that > node is not disabled, then do not change the reset value of I2C_CFG > register. > I'd like to try this out. Do we have to a scenario where both hs-i2c and legacy i2c nodes are added to the dts file without disabling either of them or is it expected that one of these will always be disabled in the board-specific dts file (as only one can work at a time) ? > Thanks, > Thomas. >
On 7 November 2012 09:12, Abhilash Kesavan <kesavan.abhilash@gmail.com> wrote: > Hi Thomas, > > Thanks for the suggestions. > > On Tue, Nov 6, 2012 at 1:45 PM, Thomas Abraham > <thomas.abraham@linaro.org> wrote: >> On 6 November 2012 11:48, Abhilash Kesavan <a.kesavan@samsung.com> wrote: >>> On Exynos5 we have a new high-speed i2c controller. The interrupt >>> sources for the legacy and new controller are muxed and are controlled >>> via the SYSCON I2C_CFG register. >>> At reset the interrupt source is configured for the high-speed controller, >>> to continue using the old i2c controller we need to modify the I2C_CFG >>> register. >> >> If the high-speed i2c controllers are not used, can this configuration >> be moved into the bootloader? >> >> The other option could be, in the exynos5250_dt_machine_init() >> function, first check if the platform is compatible with >> "samsung,exynos5250" and if so search for a high-speed i2c controller >> compatible node. If a high-speed controller node is found and if that >> node is not disabled, then do not change the reset value of I2C_CFG >> register. >> > I'd like to try this out. Do we have to a scenario where both hs-i2c and legacy > i2c nodes are added to the dts file without disabling either of them or is it > expected that one of these will always be disabled in the board-specific > dts file (as only one can work at a time) ? I would expect only one of the two types of i2c controller to be enabled in the board dts file. I don't think there will be use case where we have to switch between low-speed and high-speed controllers at runtime. And, since there are four interrupt configuration bits in I2C_CFG, alias id would be required to determine which bit in the I2C_CFG register has be setup. Thanks, Thomas.
Thanks for the clarification. On Wed, Nov 7, 2012 at 9:35 AM, Thomas Abraham <thomas.abraham@linaro.org> wrote: > On 7 November 2012 09:12, Abhilash Kesavan <kesavan.abhilash@gmail.com> wrote: >> Hi Thomas, >> >> Thanks for the suggestions. >> >> On Tue, Nov 6, 2012 at 1:45 PM, Thomas Abraham >> <thomas.abraham@linaro.org> wrote: >>> On 6 November 2012 11:48, Abhilash Kesavan <a.kesavan@samsung.com> wrote: >>>> On Exynos5 we have a new high-speed i2c controller. The interrupt >>>> sources for the legacy and new controller are muxed and are controlled >>>> via the SYSCON I2C_CFG register. >>>> At reset the interrupt source is configured for the high-speed controller, >>>> to continue using the old i2c controller we need to modify the I2C_CFG >>>> register. >>> >>> If the high-speed i2c controllers are not used, can this configuration >>> be moved into the bootloader? >>> >>> The other option could be, in the exynos5250_dt_machine_init() >>> function, first check if the platform is compatible with >>> "samsung,exynos5250" and if so search for a high-speed i2c controller >>> compatible node. If a high-speed controller node is found and if that >>> node is not disabled, then do not change the reset value of I2C_CFG >>> register. >>> >> I'd like to try this out. Do we have to a scenario where both hs-i2c and legacy >> i2c nodes are added to the dts file without disabling either of them or is it >> expected that one of these will always be disabled in the board-specific >> dts file (as only one can work at a time) ? > > I would expect only one of the two types of i2c controller to be > enabled in the board dts file. I don't think there will be use case > where we have to switch between low-speed and high-speed controllers > at runtime. > > And, since there are four interrupt configuration bits in I2C_CFG, > alias id would be required to determine which bit in the I2C_CFG > register has be setup. > > Thanks, > Thomas.
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c index ed37273..badffd4 100644 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c @@ -13,10 +13,12 @@ #include <linux/serial_core.h> #include <linux/memblock.h> #include <linux/of_fdt.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/hardware/gic.h> #include <mach/map.h> +#include <mach/regs-pmu.h> #include <plat/cpu.h> #include <plat/regs-serial.h> @@ -89,6 +91,12 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { {}, }; +static void exynos5_i2c_setup(void) +{ + /* Setup the low-speed i2c controller interrupts */ + writel(0x0, EXYNOS5_SYS_I2C_CFG); +} + static void __init exynos5250_dt_map_io(void) { exynos_init_io(NULL, 0); @@ -97,6 +105,8 @@ static void __init exynos5250_dt_map_io(void) static void __init exynos5250_dt_machine_init(void) { + exynos5_i2c_setup(); + of_platform_populate(NULL, of_default_bus_match_table, exynos5250_auxdata_lookup, NULL); }
On Exynos5 we have a new high-speed i2c controller. The interrupt sources for the legacy and new controller are muxed and are controlled via the SYSCON I2C_CFG register. At reset the interrupt source is configured for the high-speed controller, to continue using the old i2c controller we need to modify the I2C_CFG register. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> --- This is a hack, I am not quite clear on how to handle this via DT. Suggestions welcome. arch/arm/mach-exynos/mach-exynos5-dt.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-)