From patchwork Thu Nov 8 01:27:36 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 1713451 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 092A63FD2B for ; Thu, 8 Nov 2012 01:30:50 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TWGvN-000052-1g; Thu, 08 Nov 2012 01:28:53 +0000 Received: from kirsty.vergenet.net ([202.4.237.240]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TWGuH-00088P-Kt for linux-arm-kernel@lists.infradead.org; Thu, 08 Nov 2012 01:27:47 +0000 Received: from ayumi.akashicho.tokyo.vergenet.net (p6117-ipbfp1901kobeminato.hyogo.ocn.ne.jp [114.172.117.117]) by kirsty.vergenet.net (Postfix) with ESMTP id 97A5A266CF1; Thu, 8 Nov 2012 12:27:41 +1100 (EST) Received: by ayumi.akashicho.tokyo.vergenet.net (Postfix, from userid 7100) id 409EBEDE60F; Thu, 8 Nov 2012 10:27:39 +0900 (JST) From: Simon Horman To: Arnd Bergmann , Olof Johansson Subject: [PATCH 7/7] ARM: shmobile: r8a7740: add FSI-DVI clocks Date: Thu, 8 Nov 2012 10:27:36 +0900 Message-Id: <1352338056-21107-8-git-send-email-horms@verge.net.au> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1352338056-21107-1-git-send-email-horms@verge.net.au> References: <1352338056-21107-1-git-send-email-horms@verge.net.au> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121107_202746_266088_D4A7AAD5 X-CRM114-Status: GOOD ( 13.72 ) X-Spam-Score: -3.3 (---) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-3.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [202.4.237.240 listed in list.dnswl.org] -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Simon Horman , arm@kernel.org, Kuninori Morimoto , linux-sh@vger.kernel.org, Magnus Damm , Paul Mundt , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Kuninori Morimoto Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-r8a7740.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c index 6729e00..71ee224 100644 --- a/arch/arm/mach-shmobile/clock-r8a7740.c +++ b/arch/arm/mach-shmobile/clock-r8a7740.c @@ -65,6 +65,9 @@ #define SMSTPCR3 IOMEM(0xe615013c) #define SMSTPCR4 IOMEM(0xe6150140) +#define FSIDIVA IOMEM(0xFE1F8000) +#define FSIDIVB IOMEM(0xFE1F8008) + /* Fixed 32 KHz root clock from EXTALR pin */ static struct clk extalr_clk = { .rate = 32768, @@ -427,6 +430,14 @@ static struct clk *late_main_clks[] = { &hdmi2_clk, }; +/* FSI DIV */ +enum { FSIDIV_A, FSIDIV_B, FSIDIV_REPARENT_NR }; + +static struct clk fsidivs[] = { + [FSIDIV_A] = SH_CLK_FSIDIV(FSIDIVA, &div6_reparent_clks[DIV6_FSIA]), + [FSIDIV_B] = SH_CLK_FSIDIV(FSIDIVB, &div6_reparent_clks[DIV6_FSIB]), +}; + /* MSTP */ enum { DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP, @@ -596,6 +607,8 @@ static struct clk_lookup lookups[] = { CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]), CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]), + CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]), + CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]), }; void __init r8a7740_clock_init(u8 md_ck) @@ -641,6 +654,9 @@ void __init r8a7740_clock_init(u8 md_ck) for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) ret = clk_register(late_main_clks[k]); + if (!ret) + ret = sh_clk_fsidiv_register(fsidivs, FSIDIV_REPARENT_NR); + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); if (!ret)