From patchwork Fri Nov 9 14:30:35 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 1720871 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 849A13FCF7 for ; Fri, 9 Nov 2012 14:32:32 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TWpbX-0004a7-QF; Fri, 09 Nov 2012 14:30:43 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TWpbU-0004Zk-E7 for linux-arm-kernel@lists.infradead.org; Fri, 09 Nov 2012 14:30:41 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id qA9EUclo000701; Fri, 9 Nov 2012 08:30:38 -0600 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id qA9EUcoo022864; Fri, 9 Nov 2012 08:30:38 -0600 Received: from dlelxv22.itg.ti.com (172.17.1.197) by dfle73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.1.323.3; Fri, 9 Nov 2012 08:30:38 -0600 Received: from localhost.localdomain (h78-6.vpn.ti.com [172.24.78.6]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id qA9EUZYH001951; Fri, 9 Nov 2012 08:30:36 -0600 From: Tero Kristo To: Subject: [PATCHv2] ARM: OMAP4: USB: power down MUSB PHY during boot Date: Fri, 9 Nov 2012 16:30:35 +0200 Message-ID: <1352471435-9560-1-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.4.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121109_093040_594991_6D658A30 X-CRM114-Status: GOOD ( 14.94 ) X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.41 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Tony Lindgren , Kevin Hilman , Felipe Balbi , linux-arm-kernel@lists.infradead.org, Kishon Vijay Abraham I X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Commit c9e4412ab8eb8ef82d645d8749c4ce96ad490007 removed all of the USB PHY functions for OMAP4, but this causes a problem with core retention as the MUSB module remains enabled if omap-usb2 phy driver is not used. This keeps the USB DPLL enabled and prevents l3_init pwrdm from idling. Fixed by adding a minimal function back that disables the USB PHY during boot. Signed-off-by: Tero Kristo Cc: Kishon Vijay Abraham I Cc: Felipe Balbi Cc: Tony Lindgren Cc: Kevin Hilman Acked-by: Felipe Balbi --- arch/arm/mach-omap2/omap_phy_internal.c | 32 +++++++++++++++++++++++++++++++ 1 files changed, 32 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c index d992db8..9b56e5e 100644 --- a/arch/arm/mach-omap2/omap_phy_internal.c +++ b/arch/arm/mach-omap2/omap_phy_internal.c @@ -33,6 +33,38 @@ #include "soc.h" #include "control.h" +#define CONTROL_DEV_CONF 0x300 +#define PHY_PD 0x1 + +/** + * omap4430_phy_power_down: disable MUSB PHY during early init + * + * OMAP4 MUSB PHY module is enabled by default on reset, but this will + * prevent core retention if not disabled by SW. USB driver will + * later on enable this, once and if the driver needs it. + */ +static int __init omap4430_phy_power_down(void) +{ + void __iomem *ctrl_base; + + if (!cpu_is_omap44xx()) + return 0; + + ctrl_base = ioremap(OMAP443X_SCM_BASE, SZ_1K); + if (!ctrl_base) { + pr_err("control module ioremap failed\n"); + return -ENOMEM; + } + + /* Power down the phy */ + __raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF); + + iounmap(ctrl_base); + + return 0; +} +early_initcall(omap4430_phy_power_down); + void am35x_musb_reset(void) { u32 regval;