From patchwork Tue Nov 13 05:03:39 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laxman Dewangan X-Patchwork-Id: 1732281 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id C8279DF280 for ; Tue, 13 Nov 2012 05:08:58 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TY8iS-0001HQ-P1; Tue, 13 Nov 2012 05:07:16 +0000 Received: from hqemgate03.nvidia.com ([216.228.121.140]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TY8hw-0001BV-J8 for linux-arm-kernel@lists.infradead.org; Tue, 13 Nov 2012 05:06:46 +0000 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Mon, 12 Nov 2012 21:09:21 -0800 Received: from hqemhub03.nvidia.com ([172.17.108.22]) by hqnvupgp08.nvidia.com (PGP Universal service); Mon, 12 Nov 2012 21:06:32 -0800 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 12 Nov 2012 21:06:32 -0800 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQEMHUB03.nvidia.com (172.20.150.15) with Microsoft SMTP Server id 8.3.279.1; Mon, 12 Nov 2012 21:06:31 -0800 Received: from thelma.nvidia.com (Not Verified[172.16.212.77]) by hqnvemgw01.nvidia.com with MailMarshal (v6,7,2,8378) id ; Mon, 12 Nov 2012 21:06:31 -0800 Received: from ldewangan-ubuntu.nvidia.com ([10.19.65.30]) by thelma.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id qAD56Qep028614; Mon, 12 Nov 2012 21:06:29 -0800 (PST) From: Laxman Dewangan To: Subject: [PATCH 1/3] ARM: tegra: dts: add sflash controller dt entry Date: Tue, 13 Nov 2012 10:33:39 +0530 Message-ID: <1352783021-25393-2-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1352783021-25393-1-git-send-email-ldewangan@nvidia.com> References: <1352783021-25393-1-git-send-email-ldewangan@nvidia.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121113_000645_003685_D3CEA196 X-CRM114-Status: UNSURE ( 9.62 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [216.228.121.140 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-tegra@vger.kernel.org, Laxman Dewangan , linux@arm.linux.org.uk, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Nvidia's Tegra20 have the SPI (SFLASH) controller to interface with spi flash device which is used for system boot. Add DT entry for this controller. Signed-off-by: Laxman Dewangan --- arch/arm/boot/dts/tegra20.dtsi | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 71a650d..32cb09d 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -195,6 +195,16 @@ status = "disabled"; }; + spi@7000c380 { + compatible = "nvidia,tegra20-sflash"; + reg = <0x7000c380 0x80>; + interrupts = <0 39 0x04>; + nvidia,dma-request-selector = <&apbdma 11>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + spi@7000d400 { compatible = "nvidia,tegra20-slink"; reg = <0x7000d400 0x200>;