From patchwork Fri Nov 16 10:53:17 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christoph Fritz X-Patchwork-Id: 1754241 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id C2033DF288 for ; Fri, 16 Nov 2012 10:55:43 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TZJYU-00034Q-Ro; Fri, 16 Nov 2012 10:53:50 +0000 Received: from mail-ea0-f177.google.com ([209.85.215.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TZJYR-00033x-Gd for linux-arm-kernel@lists.infradead.org; Fri, 16 Nov 2012 10:53:48 +0000 Received: by mail-ea0-f177.google.com with SMTP id n13so1016987eaa.36 for ; Fri, 16 Nov 2012 02:53:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=subject:from:to:cc:content-type:date:message-id:mime-version :x-mailer:content-transfer-encoding; bh=n1cjO+TdLTqTAWll6k6dplNfKtG92XjthDPQi/hLphI=; b=IaUq2Y0Ojlmq5W4KCfGaakMrXT/0ouVjd5nmOmaQ6PwWVVWNrcf2SnOr+NHEDuteas QtcGUIc0cBPNuPoeMgrz7G9tI4dkNLB+1/hYyaeSiwaIHl0jUV7GqZ7jN/F5y1/oHUWM 2c7EyjPrvpyobUPeeLam546OCH5e9cQ/R/CPnJdi+5R5ceTyPS1rX2Vm5S0L73EnKVIE g2eglyzG+kn+9qfdie91b4eDfZtdNPPPZ07agcXdSYM2jwERc6B/kcoWqEIL6RVjL6O5 QUWnhq3bl4/D+urV0eFb3srRmFrSYEmhsQKv3623GcHcQTYoDMTSBJCnDDGMQssYlw/w sEYg== Received: by 10.14.179.6 with SMTP id g6mr12281048eem.46.1353063224528; Fri, 16 Nov 2012 02:53:44 -0800 (PST) Received: from [127.0.0.1] (fritzc.com. [78.47.220.26]) by mx.google.com with ESMTPS id g5sm2781775eem.4.2012.11.16.02.53.43 (version=SSLv3 cipher=OTHER); Fri, 16 Nov 2012 02:53:44 -0800 (PST) Subject: ARM: imx: ehci-imx35: fix host power mask bit From: Christoph Fritz To: Sascha Hauer Date: Fri, 16 Nov 2012 11:53:17 +0100 Message-ID: <1353063197.3647.27.camel@mars> Mime-Version: 1.0 X-Mailer: Evolution 2.30.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121116_055347_826986_24716FD8 X-CRM114-Status: GOOD ( 12.20 ) X-Spam-Score: -1.7 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (chf.fritz[at]googlemail.com) 0.0 DKIM_ADSP_CUSTOM_MED No valid author signature, adsp_override is CUSTOM_MED -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.215.177 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.9 NML_ADSP_CUSTOM_MED ADSP custom_med hit, and not from a mailing list Cc: Fabio Estevam , Michael Burkey , Greg Kroah-Hartman , Stable , "Hans J. Koch" , Daniel Mack , Christian Hemp , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch sets HPM (Host power mask bit) to bit 16 according to i.MX35 Reference Manual. Falsely it was set to bit 8, but this controls pull-up Impedance. Reported-by: Michael Burkey Cc: Stable Signed-off-by: Christoph Fritz Acked-by: Eric Bénard --- arch/arm/mach-imx/ehci-imx35.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c index a596f70..554e7cc 100644 --- a/arch/arm/mach-imx/ehci-imx35.c +++ b/arch/arm/mach-imx/ehci-imx35.c @@ -30,7 +30,7 @@ #define MX35_H1_SIC_SHIFT 21 #define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT) #define MX35_H1_PP_BIT (1 << 18) -#define MX35_H1_PM_BIT (1 << 8) +#define MX35_H1_PM_BIT (1 << 16) #define MX35_H1_IPPUE_UP_BIT (1 << 7) #define MX35_H1_IPPUE_DOWN_BIT (1 << 6) #define MX35_H1_TLL_BIT (1 << 5)