From patchwork Sat Nov 17 14:22:24 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Lunn X-Patchwork-Id: 1759451 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 55CD8DF2A2 for ; Sat, 17 Nov 2012 14:25:01 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TZjIi-0006gu-GA; Sat, 17 Nov 2012 14:23:16 +0000 Received: from londo.lunn.ch ([80.238.139.98]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TZjIP-0006dj-Ci for linux-arm-kernel@lists.infradead.org; Sat, 17 Nov 2012 14:22:58 +0000 Received: from lunn by londo.lunn.ch with local (Exim 3.36 #1 (Debian)) id 1TZjIL-00009a-00; Sat, 17 Nov 2012 15:22:53 +0100 From: Andrew Lunn To: mturquette@linaro.org Subject: [PATCH v2 3/9] clk: armada-370-xp: add support for clock framework Date: Sat, 17 Nov 2012 15:22:24 +0100 Message-Id: <1353162150-522-4-git-send-email-andrew@lunn.ch> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1353162150-522-1-git-send-email-andrew@lunn.ch> References: <1353162150-522-1-git-send-email-andrew@lunn.ch> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121117_092257_724180_CD01A8E4 X-CRM114-Status: GOOD ( 11.61 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Thomas Petazzoni , Jason Cooper , devicetree-discuss@lists.ozlabs.org, Sebastian Hesselbarth , Gregory Clement , linux ARM X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Gregory CLEMENT Signed-off-by: Gregory CLEMENT Tested-by Gregory CLEMENT --- arch/arm/boot/dts/armada-370.dtsi | 7 ++++++ arch/arm/boot/dts/armada-xp.dtsi | 42 +++++++++++++++++++++++++++++++++++ arch/arm/mach-mvebu/Kconfig | 3 +++ arch/arm/mach-mvebu/armada-370-xp.c | 9 +++++++- 4 files changed, 60 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index 2069151..dae966c 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -75,5 +75,12 @@ #interrupts-cells = <2>; interrupts = <91>; }; + + coreclk: mvebu-sar@d0018230 { + compatible = "marvell,armada-370-core-clocks"; + reg = <0xd0018230 0x08>; + #clock-cells = <1>; + }; + }; }; diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 71d6b5d..f8382a8 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -27,6 +27,35 @@ <0xd0021870 0x58>; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "marvell,sheeva-v7"; + reg = <0>; + clocks = <&cpuclk 0>; + }; + + cpu@1 { + compatible = "marvell,sheeva-v7"; + reg = <1>; + clocks = <&cpuclk 1>; + }; + + cpu@2 { + compatible = "marvell,sheeva-v7"; + reg = <2>; + clocks = <&cpuclk 2>; + }; + + cpu@3 { + compatible = "marvell,sheeva-v7"; + reg = <3>; + clocks = <&cpuclk 3>; + }; + }; + soc { serial@d0012200 { compatible = "ns16550"; @@ -47,6 +76,19 @@ marvell,timer-25Mhz; }; + coreclk: mvebu-sar@d0018230 { + compatible = "marvell,armada-xp-core-clocks"; + reg = <0xd0018230 0x08>; + #clock-cells = <1>; + }; + + cpuclk: clock-complex@d0018700 { + #clock-cells = <1>; + compatible = "marvell,armada-xp-cpu-clockctrl"; + reg = <0xd0018700 0xA0>; + clocks = <&coreclk 1>; + }; + system-controller@d0018200 { compatible = "marvell,armada-370-xp-system-controller"; reg = <0xd0018200 0x500>; diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 416d46e..c7b8404 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -9,6 +9,9 @@ config ARCH_MVEBU select PINCTRL select PLAT_ORION select SPARSE_IRQ + select CLKDEV_LOOKUP + select MVEBU_CLK_CORE + select MVEBU_CLK_CPU if ARCH_MVEBU diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c index 49d7915..3292d6d 100644 --- a/arch/arm/mach-mvebu/armada-370-xp.c +++ b/arch/arm/mach-mvebu/armada-370-xp.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -37,8 +38,14 @@ void __init armada_370_xp_map_io(void) iotable_init(armada_370_xp_io_desc, ARRAY_SIZE(armada_370_xp_io_desc)); } +void __init armada_370_xp_timer_and_clk_init(void) +{ + mvebu_clocks_init(); + armada_370_xp_timer_init(); +} + struct sys_timer armada_370_xp_timer = { - .init = armada_370_xp_timer_init, + .init = armada_370_xp_timer_and_clk_init, }; static void __init armada_370_xp_dt_init(void)