From patchwork Mon Nov 19 05:13:15 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 1764121 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 3ABC1DF264 for ; Mon, 19 Nov 2012 10:46:43 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TaOpI-0003Cl-RS; Mon, 19 Nov 2012 10:43:41 +0000 Received: from kirsty.vergenet.net ([202.4.237.240]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TaJfw-0003As-Cu for linux-arm-kernel@lists.infradead.org; Mon, 19 Nov 2012 05:13:44 +0000 Received: from ayumi.akashicho.tokyo.vergenet.net (p4024-ipbfp1903kobeminato.hyogo.ocn.ne.jp [114.172.131.24]) by kirsty.vergenet.net (Postfix) with ESMTP id 872C9266CE0; Mon, 19 Nov 2012 16:13:36 +1100 (EST) Received: by ayumi.akashicho.tokyo.vergenet.net (Postfix, from userid 7100) id 20810EDE640; Mon, 19 Nov 2012 14:13:35 +0900 (JST) From: Simon Horman To: linux-sh@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RFC 03/15] ARM: mach-shmobile: Add support OF of INTC for r8a7740 Date: Mon, 19 Nov 2012 14:13:15 +0900 Message-Id: <1353302007-31045-4-git-send-email-horms@verge.net.au> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1353302007-31045-1-git-send-email-horms@verge.net.au> References: <1353302007-31045-1-git-send-email-horms@verge.net.au> X-Bad-Reply: References and In-Reply-To but no 'Re:' in Subject. X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121119_001341_043023_C8F2735D X-CRM114-Status: GOOD ( 22.24 ) X-Spam-Score: -3.3 (---) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-3.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [202.4.237.240 listed in list.dnswl.org] -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-Mailman-Approved-At: Mon, 19 Nov 2012 05:36:52 -0500 Cc: Nobuhiro Iwamatsu , Simon Horman , Magnus Damm X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Nobuhiro Iwamatsu This CPU has three interrupt controllers (INTCA, INTCS and INTCA IRQ pins). This supports these. Cc: Magnus Damm Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Simon Horman --- v2 [Simon Horman] * Use #ifdef instead of #if defined * Use CONFIG_OF in place of CONFIG_OF_SH_INTC * Allow OF and non OF code to be compiled in the same binary and provide r8a7740_init_irq_of() as a way to initialise INTC using DT while r8a7740_init_irq() still initialises INTC using the previous code paths. This is because we would like to be able to use a single configuration to compile a kernel for multiple boards and not all r8a7740 boards have DT support yet. v1 [Nobuhiro Iwamatsu] --- arch/arm/mach-shmobile/include/mach/common.h | 1 + arch/arm/mach-shmobile/intc-r8a7740.c | 136 +++++++++++++++++++++++++- 2 files changed, 132 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index d47e215..8402b5d 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -59,6 +59,7 @@ extern struct clk sh73a0_extal2_clk; extern struct clk sh73a0_extcki_clk; extern struct clk sh73a0_extalr_clk; +extern void r8a7740_init_irq_of(void); extern void r8a7740_init_irq(void); extern void r8a7740_map_io(void); extern void r8a7740_add_early_devices(void); diff --git a/arch/arm/mach-shmobile/intc-r8a7740.c b/arch/arm/mach-shmobile/intc-r8a7740.c index 9a69a31..878fdc6 100644 --- a/arch/arm/mach-shmobile/intc-r8a7740.c +++ b/arch/arm/mach-shmobile/intc-r8a7740.c @@ -1,8 +1,9 @@ /* * R8A7740 processor support * - * Copyright (C) 2011 Renesas Solutions Corp. + * Copyright (C) 2011, 2012 Renesas Solutions Corp. * Copyright (C) 2011 Kuninori Morimoto + * Copyright (C) 2012 Nobuhiro Iwamatsu * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -29,6 +30,105 @@ #include #include +#ifdef CONFIG_OF + +static struct intc_desc intca_desc __initdata; +static struct resource intca_resources[2] __initdata; +static struct intc_desc intcs_desc __initdata; +static struct resource intcs_resources[2] __initdata; +static struct intc_desc intca_irq_pins_desc __initdata; +static struct resource intca_pins_resources[1] __initdata; +static unsigned short intevtsa_vect; + +static int r8a7740_intca_of_init(struct device_node *np, + struct device_node *parent) +{ + int ret; + + if (WARN_ON(!np)) + return -ENODEV; + + ret = of_sh_intc_get_meminfo(np, + intca_resources, ARRAY_SIZE(intcs_resources)); + if (ret) + goto error; + + intca_desc.resource = intca_resources; + intca_desc.num_resources = ARRAY_SIZE(intca_resources); + + ret = of_sh_intc_get_intc(np, &intca_desc); + if (ret) + goto error; + + intca_desc.name = "r8a7740-intca"; +error: + return ret; +} + +static int r8a7740_intcs_of_init(struct device_node *np, + struct device_node *parent) +{ + int ret; + + if (WARN_ON(!np)) + return -ENODEV; + + ret = of_sh_intc_get_meminfo(np, + intcs_resources, ARRAY_SIZE(intcs_resources)); + if (ret) + goto error; + + intcs_desc.resource = intcs_resources; + intcs_desc.num_resources = ARRAY_SIZE(intcs_resources); + + ret = of_sh_intc_get_intc(np, &intcs_desc); + if (ret) + goto error; + + of_sh_intc_get_intevtsa_vect(np, &intevtsa_vect); + + intcs_desc.name = "r8a7740-intcs"; + +error: + return ret; +} + +static int r8a7740_intca_pins_of_init(struct device_node *np, + struct device_node *parent) +{ + int ret; + + if (WARN_ON(!np)) + return -ENODEV; + + ret = of_sh_intc_get_meminfo(np, intca_pins_resources, + ARRAY_SIZE(intca_pins_resources)); + if (ret) + goto error; + + intca_irq_pins_desc.resource = intca_pins_resources; + intca_irq_pins_desc.num_resources = ARRAY_SIZE(intca_pins_resources); + + ret = of_sh_intc_get_intc_pins(np, &intca_irq_pins_desc); + if (ret) + goto error; + + intca_irq_pins_desc.name = "r8a7740-intca-irq-pins"; + +error: + return ret; +} + +static const struct of_device_id irq_of_match[] __initconst = { + { .compatible = "renesas,sh_intcs", .data = r8a7740_intcs_of_init }, + { .compatible = "renesas,sh_intca_irq_pins", + .data = r8a7740_intca_pins_of_init }, + { .compatible = "renesas,sh_intca", .data = r8a7740_intca_of_init }, + { /*sentinel*/ } +}; + +#endif /* CONFIG_OF */ + /* * INTCA */ @@ -623,15 +723,41 @@ static void intcs_demux(unsigned int irq, struct irq_desc *desc) generic_handle_irq(intcs_evt2irq(evtcodeas)); } -void __init r8a7740_init_irq(void) +static void __init r8a7740_init_irq__(bool of) { - void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); + void __iomem *intevtsa; + +#ifdef CONFIG_OF + if (of) + of_irq_init(irq_of_match); +#endif register_intc_controller(&intca_desc); register_intc_controller(&intca_irq_pins_desc); register_intc_controller(&intcs_desc); /* demux using INTEVTSA */ - irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa); - irq_set_chained_handler(evt2irq(0xf80), intcs_demux); + intevtsa = ioremap_nocache(intcs_resources[0].start + 0x100, PAGE_SIZE); +#ifdef CONFIG_OF + if (of) { + irq_set_handler_data(evt2irq(intevtsa_vect), (void *)intevtsa); + irq_set_chained_handler(evt2irq(intevtsa_vect), intcs_demux); + } else +#endif + { + irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa); + irq_set_chained_handler(evt2irq(0xf80), intcs_demux); + } +} + +#ifdef CONFIG_OF +void __init r8a7740_init_irq_of(void) +{ + r8a7740_init_irq__(true); +} +#endif + +void __init r8a7740_init_irq(void) +{ + r8a7740_init_irq__(false); }