From patchwork Tue Nov 27 13:00:35 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naveen Krishna Chatradhi X-Patchwork-Id: 1810951 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 058DE3FC54 for ; Tue, 27 Nov 2012 13:06:13 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TdKp7-0004Bq-E5; Tue, 27 Nov 2012 13:03:37 +0000 Received: from mailout2.samsung.com ([203.254.224.25]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TdKp0-000496-Pm for linux-arm-kernel@lists.infradead.org; Tue, 27 Nov 2012 13:03:33 +0000 Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0ME500M8ZDLJ3NI0@mailout2.samsung.com> for linux-arm-kernel@lists.infradead.org; Tue, 27 Nov 2012 22:03:28 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.124]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 0F.FA.12699.02AB4B05; Tue, 27 Nov 2012 22:03:28 +0900 (KST) X-AuditID: cbfee61b-b7f616d00000319b-44-50b4ba2065d6 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 6E.FA.12699.02AB4B05; Tue, 27 Nov 2012 22:03:28 +0900 (KST) Received: from naveen-linux.sisodomain.com ([107.108.83.161]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0ME500JWODHPQ570@mmp1.samsung.com> for linux-arm-kernel@lists.infradead.org; Tue, 27 Nov 2012 22:03:28 +0900 (KST) From: Naveen Krishna Chatradhi To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, linux-i2c@vger.kernel.org Subject: [PATCH 2/3] ARM: exynos5: Add gate clocks for HS-I2C Date: Tue, 27 Nov 2012 18:30:35 +0530 Message-id: <1354021236-28596-3-git-send-email-ch.naveen@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1354021236-28596-1-git-send-email-ch.naveen@samsung.com> References: <1354021236-28596-1-git-send-email-ch.naveen@samsung.com> DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrBLMWRmVeSWpSXmKPExsWyRsSkRldh15YAg3s/xC02Pb7G6sDosXlJ fQBjFJdNSmpOZllqkb5dAlfGv2WKBTc4Kw7e6mBrYHzA3sXIwSEhYCLRcpWji5ETyBSTuHBv PVsXIxeHkMBSRonGhw9YIRImEpvXbWYEsYUEFjFKLL1VBVG0lUniwvY1TCAJNgEziYOLVrOD JEQEehklFm7aygziMIN0nLl4lBlknbCArcSVp2ANLAKqEhO/LmEBsXkFXCUutdxgg7hIQWLO JBsQk1PATWLFDhuIva4Sa7+dY4ToFJD4NvkQC0S1rMSmA2CLJAQus0ns27WODeJmSYmDK26w TGAUXsDIsIpRNLUguaA4KT3XSK84Mbe4NC9dLzk/dxMjMPhO/3smvYNxVYPFIUYBDkYlHt7M RZsDhFgTy4orcw8xSnAwK4nwLly1JUCINyWxsiq1KD++qDQntfgQow/QJROZpUST84GRkVcS b2hsYm5qbGppZGRmaopDWEmct9kjJUBIID2xJDU7NbUgtQhmHBMHp1QDY0mDXKlJaoP/6XAu z8Za99gtYQxrw765GMwWqPQtFIuq61rpyGCZtLNm7uy5H1aYSN4XlVixJ8F7SfS90DtCU4q/ fLk7V2W2VtaMi7nCX+5cMU5+VR6c6Ki+c9VipTnaijc//nnxe+qCnmxl5eMhHlorpzHe6FPj vs6k8yWda/HencWPjqYtUWIpzkg01GIuKk4EADhv1oNrAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupgkeLIzCtJLcpLzFFi42I5/e+xgK7Cri0BBgt7eC02Pb7G6sDosXlJ fQBjVAOjTUZqYkpqkUJqXnJ+SmZeuq2Sd3C8c7ypmYGhrqGlhbmSQl5ibqqtkotPgK5bZg7Q VCWFssScUqBQQGJxsZK+HaYJoSFuuhYwjRG6viFBcD1GBmggYQ1jxr9ligU3OCsO3upga2B8 wN7FyMkhIWAisXndZkYIW0ziwr31bCC2kMAiRomlt6q6GLmA7K1MEhe2r2ECSbAJmEkcXLSa HSQhItDLKLFw01ZmEIcZpOPMxaNADgeHsICtxJWnYA0sAqoSE78uYQGxeQVcJS613GADKZEQ UJCYM8kGxOQUcJNYscMGYq+rxNpv5xgnMPIuYGRYxSiaWpBcUJyUnmukV5yYW1yal66XnJ+7 iREc3M+kdzCuarA4xCjAwajEw5u5aHOAEGtiWXFl7iFGCQ5mJRHehau2BAjxpiRWVqUW5ccX leakFh9i9AG6aSKzlGhyPjDy8kriDY1NzE2NTS1NLEzMLHEIK4nzNnukBAgJpCeWpGanphak FsGMY+LglGpg1MpiubJd5taU7RUNt/aWCBWtdmLyis8/tnm7ijiX4mcbnSVVMqe4C44ZTYr8 VchyL3Bpnq92eP4vaQXD/C/urvLb7nd1fi3x+BBg1urBLnqtZ25MsNHa1dtjl//kWLXaJiMz s2f3lft86omJxvcSAoLPnXkjVrTue67gk+ehj+4c0Yk5+FlMiaU4I9FQi7moOBEA3n7A/ZsC AAA= X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121127_080331_557172_5B9D6413 X-CRM114-Status: UNSURE ( 8.82 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.25 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: kgene.kim@samsung.com, w.sang@pengutronix.de, linux-kernel@vger.kernel.org, grant.likely@secretlab.ca, taeggyun.ko@samsung.com, naveenkrishna.ch@gmail.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Adds clock gating bits for High Speed I2C channels 0, 1, 2 and 3. Signed-off-by: Naveen Krishna Chatradhi --- arch/arm/mach-exynos/clock-exynos5.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c index 2d3057b..37c6104 100644 --- a/arch/arm/mach-exynos/clock-exynos5.c +++ b/arch/arm/mach-exynos/clock-exynos5.c @@ -781,6 +781,26 @@ static struct clk exynos5_init_clocks_off[] = { .enable = exynos5_clk_ip_peric_ctrl, .ctrlbit = (1 << 26), }, { + .name = "hsi2c", + .devname = "exynos5-hs-i2c.0", + .enable = exynos5_clk_ip_peric_ctrl, + .ctrlbit = (1 << 28), + }, { + .name = "hsi2c", + .devname = "exynos5-hs-i2c.1", + .enable = exynos5_clk_ip_peric_ctrl, + .ctrlbit = (1 << 29), + }, { + .name = "hsi2c", + .devname = "exynos5-hs-i2c.2", + .enable = exynos5_clk_ip_peric_ctrl, + .ctrlbit = (1 << 30), + }, { + .name = "hsi2c", + .devname = "exynos5-hs-i2c.3", + .enable = exynos5_clk_ip_peric_ctrl, + .ctrlbit = (1 << 31), + }, { .name = "ac97", .devname = "samsung-ac97", .enable = exynos5_clk_ip_peric_ctrl,