From patchwork Tue Dec 11 01:18:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Gunthorpe X-Patchwork-Id: 1860681 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 8DB823FCA5 for ; Tue, 11 Dec 2012 01:22:08 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TiEUI-0005aE-AX; Tue, 11 Dec 2012 01:18:22 +0000 Received: from quartz.orcorp.ca ([184.70.90.242]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TiEUD-0005Zc-Jp for linux-arm-kernel@lists.infradead.org; Tue, 11 Dec 2012 01:18:18 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=obsidianresearch.com; s=rsa1; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=2eRjlhjjL2G/yfOLKi11oYrtvb++dfdkC657nUkupio=; b=umcfAi/8xLgHni/ksaBuyo6n7Ynpvk11QXMa0bqjoqX6YkMDgb5In6OT5PifOq/plQy2EdrCV2UYQ/w8alnnxVVyY8bkhhceBKnC0z5miNZ/1HezC613NLJFtP1wBPFSRI2nI3PVUZFa6rOV+vG2z5GAPhh5gBNmEmm0slWP1w8=; Received: from [10.0.0.162] (helo=localhost.localdomain) by quartz.orcorp.ca with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.72) (envelope-from ) id 1TiEU7-00017h-2v; Mon, 10 Dec 2012 18:18:11 -0700 From: Jason Gunthorpe To: Sebastian Hesselbarth , Andrew Lunn , Thomas Petazzoni , Jason Cooper , Arnd Bergmann , linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/3] ARM: Orion: Bind the orion bridge interrupt controller through DT Date: Mon, 10 Dec 2012 18:18:02 -0700 Message-Id: <1355188683-18208-2-git-send-email-jgunthorpe@obsidianresearch.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1355188683-18208-1-git-send-email-jgunthorpe@obsidianresearch.com> References: <1355188683-18208-1-git-send-email-jgunthorpe@obsidianresearch.com> X-Broken-Reverse-DNS: no host name found for IP address 10.0.0.162 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121210_201817_968251_CDD2F39B X-CRM114-Status: GOOD ( 15.81 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Jason Gunthorpe X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This adds the common DT code and board support for kirkwood and dove - Add the marvell,orion-bridge-intc DT node to the DTSI file - Make the call to orion_bridge_irq_init happen only in the non-DT case Signed-off-by: Jason Gunthorpe --- .../devicetree/bindings/arm/mrvl/intc.txt | 21 ++++++++++++++++++++ arch/arm/boot/dts/dove.dtsi | 10 +++++++++ arch/arm/boot/dts/kirkwood.dtsi | 12 +++++++++++ arch/arm/mach-dove/common.c | 4 --- arch/arm/mach-dove/irq.c | 5 ++++ arch/arm/mach-kirkwood/common.c | 4 --- arch/arm/mach-kirkwood/irq.c | 5 ++++ arch/arm/plat-orion/irq.c | 20 +++++++++++++++++++ 8 files changed, 73 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/mrvl/intc.txt b/Documentation/devicetree/bindings/arm/mrvl/intc.txt index 8b53273..cf633f1 100644 --- a/Documentation/devicetree/bindings/arm/mrvl/intc.txt +++ b/Documentation/devicetree/bindings/arm/mrvl/intc.txt @@ -58,3 +58,24 @@ Example: reg = <0xfed20204 0x04>, <0xfed20214 0x04>; }; + +* Marvell Orion Bridge Interrupt controller + +Required properties +- compatible : Should be "marvell,orion-bridge-intc". +- #interrupt-cells: Specifies the number of cells needed to encode an + interrupt source. Supported value is <1>. +- interrupt-controller : Declare this node to be an interrupt controller. +- interrupts: The interrupt number the bridge is attached to on the main + controller. +- reg : Interrupt cause address. + +Example: + + bridge_intc: bridge_intc@20110 { + compatible = "marvell,orion-bridge-intc"; + interrupt-controller; + #interrupt-cells = <1>; + interrupts = <1>; + reg = <0x20110 0x08>; + }; diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 5a00022..b726ba8 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -67,6 +67,8 @@ status = "disabled"; }; + /* The interrupt controller stanzas are in an + * order that matches irqs.h */ gpio0: gpio@d0400 { compatible = "marvell,orion-gpio"; #gpio-cells = <2>; @@ -93,6 +95,14 @@ ngpio = <8>; }; + bridge_intc: bridge_intc@20110 { + compatible = "marvell,orion-bridge-intc"; + interrupt-controller; + #interrupt-cells = <1>; + interrupts = <0>; + reg = <0x20110 0x08>; + }; + spi0: spi@10600 { compatible = "marvell,orion-spi"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index 4e5b815..854e532 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi @@ -19,6 +19,8 @@ #address-cells = <1>; #size-cells = <1>; + /* The interrupt controller stanzas are in an + * order that matches irqs.h */ gpio0: gpio@10100 { compatible = "marvell,orion-gpio"; #gpio-cells = <2>; @@ -37,6 +39,14 @@ interrupts = <39>, <40>, <41>; }; + bridge_intc: bridge_intc@20110 { + compatible = "marvell,orion-bridge-intc"; + interrupt-controller; + #interrupt-cells = <1>; + interrupts = <1>; + reg = <0x20110 0x08>; + }; + serial@12000 { compatible = "ns16550a"; reg = <0x12000 0x100>; @@ -73,6 +83,8 @@ wdt@20300 { compatible = "marvell,orion-wdt"; + interrupt-parent = <&bridge_intc>; + interrupts = <3>; reg = <0x20300 0x28>; status = "okay"; }; diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index 6bad21b..b570211 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c @@ -243,10 +243,6 @@ static int __init dove_find_tclk(void) static void __init dove_timer_init(void) { dove_tclk = dove_find_tclk(); - if (orion_bridge_irq_init(IRQ_DOVE_BRIDGE, - IRQ_DOVE_BRIDGE_START, - BRIDGE_CAUSE, NULL)) - panic("Unable to setup bridge irqs"); orion_time_init(IRQ_DOVE_BRIDGE_TIMER1, dove_tclk); } diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c index bc4344a..bcb193f 100644 --- a/arch/arm/mach-dove/irq.c +++ b/arch/arm/mach-dove/irq.c @@ -139,4 +139,9 @@ void __init dove_init_irq(void) set_irq_flags(i, IRQF_VALID); } irq_set_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler); + + if (orion_bridge_irq_init(IRQ_DOVE_BRIDGE, + IRQ_DOVE_BRIDGE_START, + BRIDGE_CAUSE, NULL)) + panic("Unable to setup bridge irqs"); } diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index ccd3ed5..7398f8b 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c @@ -535,10 +535,6 @@ static void __init kirkwood_timer_init(void) { kirkwood_tclk = kirkwood_find_tclk(); - if (orion_bridge_irq_init(IRQ_KIRKWOOD_BRIDGE, - IRQ_KIRKWOOD_BRIDGE_START, - BRIDGE_CAUSE, NULL)) - panic("Unable to setup bridge irqs"); orion_time_init(IRQ_KIRKWOOD_BRIDGE_TIMER1, kirkwood_tclk); } diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c index 8847035..a1388ef 100644 --- a/arch/arm/mach-kirkwood/irq.c +++ b/arch/arm/mach-kirkwood/irq.c @@ -41,4 +41,9 @@ void __init kirkwood_init_irq(void) IRQ_KIRKWOOD_GPIO_START, gpio0_irqs); orion_gpio_init(NULL, 32, 18, GPIO_HIGH_VIRT_BASE, 0, IRQ_KIRKWOOD_GPIO_START + 32, gpio1_irqs); + + if (orion_bridge_irq_init(IRQ_KIRKWOOD_BRIDGE, + IRQ_KIRKWOOD_BRIDGE_START, + BRIDGE_CAUSE, NULL)) + panic("Unable to setup bridge irqs"); } diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c index a903012..2dcccda 100644 --- a/arch/arm/plat-orion/irq.c +++ b/arch/arm/plat-orion/irq.c @@ -131,9 +131,29 @@ static int __init orion_add_irq_domain(struct device_node *np, return 0; } +static int __init orion_add_bridge_irq_domain( + struct device_node *np, struct device_node *interrupt_parent) +{ + void __iomem *base; + int bridge_irq; + + base = of_iomap(np, 0); + if (!base) + return -ENODEV; + bridge_irq = irq_of_parse_and_map(np, 0); + /* FIXME: irq_of_parse_and_map returns 0 on error, but on Dove the + * bridge IRQ is 0. + if (!bridge_irq) + return -ENODEV;*/ + + return orion_bridge_irq_init(bridge_irq, -1, base, np); +} + static const struct of_device_id orion_irq_match[] = { { .compatible = "marvell,orion-intc", .data = orion_add_irq_domain, }, + { .compatible = "marvell,orion-bridge-intc", + .data = orion_add_bridge_irq_domain, }, {}, };