From patchwork Thu Dec 13 16:47:43 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Gautam X-Patchwork-Id: 1875531 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 03840DF23A for ; Thu, 13 Dec 2012 16:44:59 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TjBr5-0007qB-Ec; Thu, 13 Dec 2012 16:41:51 +0000 Received: from mailout1.samsung.com ([203.254.224.24]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TjBr0-0007pe-K3 for linux-arm-kernel@lists.infradead.org; Thu, 13 Dec 2012 16:41:48 +0000 Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MEZ005SNADFMLQ0@mailout1.samsung.com> for linux-arm-kernel@lists.infradead.org; Fri, 14 Dec 2012 01:41:43 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.126]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id A9.B3.01231.7450AC05; Fri, 14 Dec 2012 01:41:43 +0900 (KST) X-AuditID: cbfee61a-b7fa66d0000004cf-b3-50ca05473e7b Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id E8.B3.01231.7450AC05; Fri, 14 Dec 2012 01:41:43 +0900 (KST) Received: from vivekkumarg-linuxpc.sisodomain.com ([107.108.73.134]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MEZ00BIEACK9G80@mmp1.samsung.com> for linux-arm-kernel@lists.infradead.org; Fri, 14 Dec 2012 01:41:43 +0900 (KST) From: Vivek Gautam To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree-discuss@lists.ozlabs.org Subject: [PATCH v3] ARM: Exynos5250: Enabling dwc3-exynos driver Date: Thu, 13 Dec 2012 22:17:43 +0530 Message-id: <1355417263-27369-1-git-send-email-gautam.vivek@samsung.com> X-Mailer: git-send-email 1.7.6.5 In-reply-to: References: DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrFLMWRmVeSWpSXmKPExsWyRsSkTted9VSAwen/OhabHl9jdWD02Lyk PoAxissmJTUnsyy1SN8ugSvj8gOzgkvaFXvWT2ZuYNyj3MXIySEhYCJx70w3E4QtJnHh3nq2 LkYuDiGBpYwSv/adZ4YpujnzPgtEYhGjxNQZG9hBEkICe5gkfqwUArHZBHQlmt7uYgSxRQSK JPbN/8EM0sAs8IRR4uCniSwgCWEBB4k1a36BFbEIqEqcfHcNLM4r4CExve0z1DYFiTe3n4HZ nALBEjsOrAaq5wBaFiDx+pwTRKuAxLfJh1hAwhICshKbDoCtkhC4zCaxcst9qDGSEgdX3GCZ wCi8gJFhFaNoakFyQXFSeq6hXnFibnFpXrpecn7uJkZgAJ7+90xqB+PKBotDjAIcjEo8vAXh JwOEWBPLiitzDzFKcDArifDeeA0U4k1JrKxKLcqPLyrNSS0+xOgDdMlEZinR5HxgdOSVxBsa m5ibGptaGhmZmZriEFYS5232SAkQEkhPLEnNTk0tSC2CGcfEwSnVwFgty/4rSOiJ97rpZZ/5 N56cmxaWefK8o/4xt9XbOCoeegbm8GZFhzDEHxB59LTl1HSlbZtKl8jObH38S3F75NbK9Fmm cqW74vyXejdX/Dj3z5j5ka3SjhA13plPfsg6f37ysG+lQX7A9J/nz0x8snMq483P1wxynQ1q 39eJPJ09Oz43q8ng/xklluKMREMt5qLiRADR/t5XbQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupkkeLIzCtJLcpLzFFi42I5/e+xgK4766kAg49LFS02Pb7G6sDosXlJ fQBjVAOjTUZqYkpqkUJqXnJ+SmZeuq2Sd3C8c7ypmYGhrqGlhbmSQl5ibqqtkotPgK5bZg7Q VCWFssScUqBQQGJxsZK+HaYJoSFuuhYwjRG6viFBcD1GBmggYQ1jxuUHZgWXtCv2rJ/M3MC4 R7mLkZNDQsBE4ubM+ywQtpjEhXvr2boYuTiEBBYxSkydsYEdJCEksIdJ4sdKIRCbTUBXount LkYQW0SgSGLf/B/MIA3MAk8YJQ5+mgg2SVjAQWLNml9gRSwCqhIn310Di/MKeEhMb/vMDLFN QeLN7WdgNqdAsMSOA6uB6jmAlgVIvD7nNIGRdwEjwypG0dSC5ILipPRcQ73ixNzi0rx0veT8 3E2M4PB+JrWDcWWDxSFGAQ5GJR7egvCTAUKsiWXFlbmHGCU4mJVEeG+8BgrxpiRWVqUW5ccX leakFh9i9AE6aiKzlGhyPjD28kriDY1NzE2NTS1NLEzMLHEIK4nzNnukBAgJpCeWpGanphak FsGMY+LglGpgnDbhsVPyYb168cxUqXdFu0LnCTEnK/sf8mKbunX1UQv9G3fO+K++/vuUtbmS 12H7E5PY+Tucu++mtTZJLZ1UblP7/vTEpc9vTuLZE/CRdaPcQmOhyrKsuB7nrtutriyTFvUr nDnrFyfM8PpkXGT2jDrWnKis3zaZbpP3sx6r8VTozZ9t9V1DiaU4I9FQi7moOBEA2I8R+JwC AAA= X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121213_114147_224190_5F2096A5 X-CRM114-Status: GOOD ( 16.12 ) X-Spam-Score: -4.6 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.24 listed in list.dnswl.org] 3.0 KHOP_BIG_TO_CC Sent to 10+ recipients instaed of Bcc or a list -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: kgene.kim@samsung.com, p.paneri@samsung.com, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, balbi@ti.com, tomasz.figa@gmail.com, grant.likely@secretlab.ca, av.tikhomirov@samsung.com, thomas.abraham@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Adding DWC3 device tree node for Exynos5250 along with the device address and clock support needed for the controller. Signed-off-by: Vivek Gautam --- Changes from v2: - Changed the compatible string to chip specific(samsung,exynos5250), since dwc3-exynos is being used from exynso5250 onwards. - Based on changes for USB 2.0: https://lists.ozlabs.org/pipermail/devicetree-discuss/2012-December/024413.html Changes from v1: - Changed the device node name from 'dwc3' to 'usb@12000000'. - Added the documentation for device tree bindings for dwc3 controller. .../devicetree/bindings/usb/exynos-usb.txt | 14 +++++++++++ arch/arm/boot/dts/exynos5250.dtsi | 6 +++++ arch/arm/mach-exynos/Kconfig | 1 + arch/arm/mach-exynos/clock-exynos5.c | 24 ++++++++++++++++++++ arch/arm/mach-exynos/include/mach/map.h | 1 + arch/arm/mach-exynos/mach-exynos5-dt.c | 2 + 6 files changed, 48 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/exynos-usb.txt b/Documentation/devicetree/bindings/usb/exynos-usb.txt index f66fcdd..d660410 100644 --- a/Documentation/devicetree/bindings/usb/exynos-usb.txt +++ b/Documentation/devicetree/bindings/usb/exynos-usb.txt @@ -38,3 +38,17 @@ Example: reg = <0x12120000 0x100>; interrupts = <0 71 0>; }; + +DWC3 +Required properties: + - compatible: should be "samsung,exynos5250-dwc3" for USB 3.0 DWC3 controller. + - reg: physical base address of the controller and length of memory mapped + region. + - interrupts: interrupt number to the cpu. + +Example: + usb@12000000 { + compatible = "samsung,exynos5250-dwc3"; + reg = <0x12000000 0x10000>; + interrupts = <0 72 0>; + }; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 75510d1..001a31b 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -299,6 +299,12 @@ rx-dma-channel = <&pdma0 11>; /* preliminary */ }; + usb@12000000 { + compatible = "samsung,exynos5250-dwc3"; + reg = <0x12000000 0x10000>; + interrupts = <0 72 0>; + }; + usb@12110000 { compatible = "samsung,exynos4210-ehci"; reg = <0x12110000 0x100>; diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 91d5b6f..09f9587 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -426,6 +426,7 @@ config MACH_EXYNOS5_DT depends on ARCH_EXYNOS5 select ARM_AMBA select USE_OF + select USB_ARCH_HAS_XHCI help Machine support for Samsung EXYNOS5 machine with device tree enabled. Select this if a fdt blob is available for the EXYNOS5 SoC based board. diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c index 5c63bc7..f2214a0 100644 --- a/arch/arm/mach-exynos/clock-exynos5.c +++ b/arch/arm/mach-exynos/clock-exynos5.c @@ -768,6 +768,11 @@ static struct clk exynos5_init_clocks_off[] = { .enable = exynos5_clk_ip_fsys_ctrl , .ctrlbit = (1 << 18), }, { + .name = "usbdrd30", + .parent = &exynos5_clk_aclk_200.clk, + .enable = exynos5_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 19), + }, { .name = "usbotg", .enable = exynos5_clk_ip_fsys_ctrl, .ctrlbit = (1 << 7), @@ -1121,6 +1126,16 @@ static struct clksrc_sources exynos5_clkset_group = { .nr_sources = ARRAY_SIZE(exynos5_clkset_group_list), }; +struct clk *exynos5_clkset_usbdrd30_list[] = { + [0] = &exynos5_clk_mout_mpll.clk, + [1] = &exynos5_clk_mout_cpll.clk, +}; + +struct clksrc_sources exynos5_clkset_usbdrd30 = { + .sources = exynos5_clkset_usbdrd30_list, + .nr_sources = ARRAY_SIZE(exynos5_clkset_usbdrd30_list), +}; + /* Possible clock sources for aclk_266_gscl_sub Mux */ static struct clk *clk_src_gscl_266_list[] = { [0] = &clk_ext_xtal_mux, @@ -1415,6 +1430,15 @@ static struct clksrc_clk exynos5_clksrcs[] = { .parent = &exynos5_clk_mout_cpll.clk, }, .reg_div = { .reg = EXYNOS5_CLKDIV_GEN, .shift = 4, .size = 3 }, + }, { + .clk = { + .name = "sclk_usbdrd30", + .enable = exynos5_clksrc_mask_fsys_ctrl, + .ctrlbit = (1 << 28), + }, + .sources = &exynos5_clkset_usbdrd30, + .reg_src = { .reg = EXYNOS5_CLKSRC_FSYS, .shift = 28, .size = 1 }, + .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS0, .shift = 24, .size = 4 }, }, }; diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 4bf6fd9..74470ca 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -201,6 +201,7 @@ #define EXYNOS4_PA_EHCI 0x12580000 #define EXYNOS4_PA_OHCI 0x12590000 #define EXYNOS4_PA_HSPHY 0x125B0000 +#define EXYNOS5_PA_DRD 0x12000000 #define EXYNOS5_PA_EHCI 0x12110000 #define EXYNOS5_PA_OHCI 0x12120000 #define EXYNOS4_PA_MFC 0x13400000 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c index 07aa586..26dd6c8 100644 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c @@ -114,6 +114,8 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { "s5p-ehci", NULL), OF_DEV_AUXDATA("samsung,exynos4210-ohci", EXYNOS5_PA_OHCI, "exynos-ohci", NULL), + OF_DEV_AUXDATA("samsung,exynos5250-dwc3", EXYNOS5_PA_DRD, + "exynos-dwc3", NULL), {}, };