From patchwork Mon Dec 17 21:02:15 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 1888971 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 42D7EDF266 for ; Mon, 17 Dec 2012 21:05:54 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Tkhps-0002cv-MO; Mon, 17 Dec 2012 21:02:52 +0000 Received: from wolverine02.qualcomm.com ([199.106.114.251]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TkhpO-0002Zj-5c for linux-arm-kernel@lists.infradead.org; Mon, 17 Dec 2012 21:02:24 +0000 X-IronPort-AV: E=Sophos;i="4.84,304,1355126400"; d="scan'208";a="14773300" Received: from pdmz-ns-mip.qualcomm.com (HELO mostmsg01.qualcomm.com) ([199.106.114.10]) by wolverine02.qualcomm.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 17 Dec 2012 13:02:19 -0800 Received: from sboyd-linux.qualcomm.com (pdmz-ns-snip_218_1.qualcomm.com [192.168.218.1]) by mostmsg01.qualcomm.com (Postfix) with ESMTPA id 190DD10004B4; Mon, 17 Dec 2012 13:02:19 -0800 (PST) From: Stephen Boyd To: Mike Turquette Subject: [PATCH 4/4] clk: zynq: Use of_init_clk_data() Date: Mon, 17 Dec 2012 13:02:15 -0800 Message-Id: <1355778135-32458-5-git-send-email-sboyd@codeaurora.org> X-Mailer: git-send-email 1.8.1.rc1 In-Reply-To: <1355778135-32458-1-git-send-email-sboyd@codeaurora.org> References: <1355778135-32458-1-git-send-email-sboyd@codeaurora.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121217_160222_537813_CD698370 X-CRM114-Status: GOOD ( 11.62 ) X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [199.106.114.251 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Soren Brinkmann , Josh Cartwright , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Reduce lines of code and simplify this driver by using the generic clock binding parsing function. This also fixes a bug where the 'flags' member of the init struct is not initialized. Signed-off-by: Stephen Boyd Cc: Josh Cartwright Cc: Soren Brinkmann --- drivers/clk/clk-zynq.c | 28 +++++++++------------------- 1 file changed, 9 insertions(+), 19 deletions(-) diff --git a/drivers/clk/clk-zynq.c b/drivers/clk/clk-zynq.c index 37a3051..0fcc23d 100644 --- a/drivers/clk/clk-zynq.c +++ b/drivers/clk/clk-zynq.c @@ -48,7 +48,6 @@ static void __init zynq_pll_clk_setup(struct device_node *np) { struct clk_init_data init; struct zynq_pll_clk *pll; - const char *parent_name; struct clk *clk; u32 regs[2]; int ret; @@ -64,12 +63,10 @@ static void __init zynq_pll_clk_setup(struct device_node *np) pll->pll_ctrl = slcr_base + regs[0]; pll->pll_cfg = slcr_base + regs[1]; - of_property_read_string(np, "clock-output-names", &init.name); - + ret = of_init_clk_data(np, &init); + if (WARN_ON(ret)) + return; init.ops = &zynq_pll_clk_ops; - parent_name = of_clk_get_parent_name(np, 0); - init.parent_names = &parent_name; - init.num_parents = 1; pll->hw.init = &init; @@ -119,13 +116,11 @@ static const struct clk_ops zynq_periph_clk_ops = { static void __init zynq_periph_clk_setup(struct device_node *np) { struct zynq_periph_clk *periph; - const char *parent_names[3]; struct clk_init_data init; int clk_num = 0, err; const char *name; struct clk *clk; u32 reg; - int i; err = of_property_read_u32(np, "reg", ®); if (WARN_ON(err)) @@ -138,12 +133,10 @@ static void __init zynq_periph_clk_setup(struct device_node *np) periph->clk_ctrl = slcr_base + reg; spin_lock_init(&periph->clkact_lock); - init.name = np->name; + err = of_init_clk_data(np, &init); + if (WARN_ON(err)) + return; init.ops = &zynq_periph_clk_ops; - for (i = 0; i < ARRAY_SIZE(parent_names); i++) - parent_names[i] = of_clk_get_parent_name(np, i); - init.parent_names = parent_names; - init.num_parents = ARRAY_SIZE(parent_names); periph->hw.init = &init; @@ -315,7 +308,6 @@ err_read_output_name: static void __init zynq_cpu_clk_setup(struct device_node *np) { struct zynq_cpu_clk *cpuclk; - const char *parent_names[3]; struct clk_init_data init; void __iomem *clk_621; struct clk *clk; @@ -335,12 +327,10 @@ static void __init zynq_cpu_clk_setup(struct device_node *np) clk_621 = slcr_base + reg[1]; spin_lock_init(&cpuclk->clkact_lock); - init.name = np->name; + err = of_init_clk_data(np, &init); + if (WARN_ON(err)) + return; init.ops = &zynq_cpu_clk_ops; - for (i = 0; i < ARRAY_SIZE(parent_names); i++) - parent_names[i] = of_clk_get_parent_name(np, i); - init.parent_names = parent_names; - init.num_parents = ARRAY_SIZE(parent_names); cpuclk->hw.init = &init;