From patchwork Sat Dec 29 20:50:38 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Abraham X-Patchwork-Id: 1919201 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 1C3F7DFB7B for ; Sat, 29 Dec 2012 21:01:58 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Tp3Uh-0006jq-9V; Sat, 29 Dec 2012 20:58:59 +0000 Received: from mail-da0-f41.google.com ([209.85.210.41]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Tp3Tl-0006Ut-08 for linux-arm-kernel@lists.infradead.org; Sat, 29 Dec 2012 20:58:04 +0000 Received: by mail-da0-f41.google.com with SMTP id e20so5238927dak.14 for ; Sat, 29 Dec 2012 12:57:59 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=urOJ68tKRIk9m+rBEf6kF7UK8dWOhg2Ts/g5Hu2FfMY=; b=crPfYgQOQEZuGFw3zZtm9R5Sq/e3uKuhuw2aYKo2WfiJAB9sDvHwLde16+FTabR+5e Jb0bOWhEa4tIfTcbjmNJ22P56teP6fgCdXf0bgK0vmcj9LBCMrv4F4WdjNe4hyF/yJjt zm2EtRB9ZBPSngWsGZZ4pXSD3pSv0kndpdduvUKrcNCjgTmrZx6SKymZOKi8O3bWuqzt kx6Yk/UrHImnYTZpKBnAqIKj0wPuh4R730lnqZiU0UeaG3MlRTtF3u+JmmD/Sh6rMtRS pOXKpdOFacEMBj2+rvYWjDP8QmocNpcua2npErDq1m8yZvgpxqyRbwA0pfGDZP1G3lpc 2hew== X-Received: by 10.68.238.106 with SMTP id vj10mr117684971pbc.40.1356814679142; Sat, 29 Dec 2012 12:57:59 -0800 (PST) Received: from localhost.localdomain (72-254-22-152.client.stsn.net. [72.254.22.152]) by mx.google.com with ESMTPS id o5sm22694880paz.32.2012.12.29.12.57.58 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 29 Dec 2012 12:57:58 -0800 (PST) From: Thomas Abraham To: devicetree-discuss@lists.ozlabs.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v3 5/5] ARM: dts: add mct device tree node for all supported Exynos SoC's Date: Sat, 29 Dec 2012 12:50:38 -0800 Message-Id: <1356814238-23895-6-git-send-email-thomas.abraham@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1356814238-23895-1-git-send-email-thomas.abraham@linaro.org> References: <1356814238-23895-1-git-send-email-thomas.abraham@linaro.org> X-Gm-Message-State: ALoCoQkdl5rKULTYFsH+T4MX3qzw+C1bAYFK7o1SkgvkXoCgUw7yoRs1XaeBZertIblS7QuBvSrE X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121229_155801_199072_201AAC07 X-CRM114-Status: UNSURE ( 9.92 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.41 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: t.figa@samsung.com, kgene.kim@samsung.com, chaos.youn@samsung.com, sylvester.nawrocki@gmail.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add MCT device tree node for Exynos4210, Exynos4212, Exynos4412 and Exynos5250. Cc: Changhwan Youn Signed-off-by: Thomas Abraham --- arch/arm/boot/dts/exynos4210.dtsi | 8 ++++++++ arch/arm/boot/dts/exynos4212.dtsi | 10 ++++++++++ arch/arm/boot/dts/exynos4412.dtsi | 8 ++++++++ arch/arm/boot/dts/exynos5250.dtsi | 21 +++++++++++++++++++++ 4 files changed, 47 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 89c7dd0..1542d86 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -47,6 +47,14 @@ <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>; }; + mct@10050000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, + <0 42 0>, <0 48 0>; + samsung,mct-nr-local-irqs = <4>; + }; + pmu { compatible = "arm,cortex-a9-pmu"; interrupt-parent = <&combiner>; diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi index c6ae200..87c6da4 100644 --- a/arch/arm/boot/dts/exynos4212.dtsi +++ b/arch/arm/boot/dts/exynos4212.dtsi @@ -25,4 +25,14 @@ gic:interrupt-controller@10490000 { cpu-offset = <0x8000>; }; + + mct@10050000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, + <1 12 0>, <1 12 0>; + samsung,mct-nr-local-irqs = <2>; + }; + + }; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index d7dfe31..ccf020a 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -25,4 +25,12 @@ gic:interrupt-controller@10490000 { cpu-offset = <0x4000>; }; + + mct@10050000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, + <1 12 0>, <1 12 0>, <1 12 0>, <1 12 0>; + samsung,mct-nr-local-irqs = <4>; + }; }; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 45799e8..7e9600d 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -69,6 +69,27 @@ <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; }; + mct@101C0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101C0000 0x800>; + interrupt-controller; + #interrups-cells = <2>; + interrupt-parent = <&mct_map>; + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, + <4 0>, <5 0>; + samsung,mct-nr-local-irqs = <2>; + + mct_map: mct-map { + compatible = "samsung,mct-map"; + #interrupt-cells = <2>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0x0 0 &combiner 23 3>, + <0x4 0 &gic 0 120 0>, + <0x5 0 &gic 0 121 0>; + }; + }; + pmu { compatible = "arm,cortex-a15-pmu"; interrupt-parent = <&combiner>;