From patchwork Fri Jan 4 11:04:01 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laxman Dewangan X-Patchwork-Id: 1932691 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 92F7EDFABD for ; Fri, 4 Jan 2013 11:07:32 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Tr553-00010b-KE; Fri, 04 Jan 2013 11:04:53 +0000 Received: from hqemgate03.nvidia.com ([216.228.121.140]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Tr54v-0000yo-UH for linux-arm-kernel@lists.infradead.org; Fri, 04 Jan 2013 11:04:46 +0000 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Fri, 04 Jan 2013 03:08:17 -0800 Received: from hqemhub03.nvidia.com ([172.17.108.22]) by hqnvupgp08.nvidia.com (PGP Universal service); Fri, 04 Jan 2013 03:04:24 -0800 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Fri, 04 Jan 2013 03:04:24 -0800 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQEMHUB03.nvidia.com (172.20.150.15) with Microsoft SMTP Server id 8.3.279.1; Fri, 4 Jan 2013 03:04:22 -0800 Received: from daphne.nvidia.com (Not Verified[172.16.212.96]) by hqnvemgw02.nvidia.com with MailMarshal (v6,7,2,8378) id ; Fri, 04 Jan 2013 03:04:22 -0800 Received: from ldewangan-ubuntu.nvidia.com ([10.19.65.30]) by daphne.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id r04B4GPJ029803; Fri, 4 Jan 2013 03:04:17 -0800 (PST) From: Laxman Dewangan To: Subject: [PATCH] ARM: DT: tegra: add DT entry for KBC controller Date: Fri, 4 Jan 2013 16:34:01 +0530 Message-ID: <1357297442-28952-1-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 1.7.1.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130104_060446_207156_34924CD0 X-CRM114-Status: UNSURE ( 9.44 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [216.228.121.140 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-tegra@vger.kernel.org, Laxman Dewangan , linux@arm.linux.org.uk, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org NVIDIA's Tegra SoCs have the matrix keyboard controller which supports 16x8 type of matrix. The number of rows and columns are configurable. Add DT entry for KBC controller. Signed-off-by: Laxman Dewangan --- arch/arm/boot/dts/tegra20.dtsi | 7 +++++++ arch/arm/boot/dts/tegra30.dtsi | 7 +++++++ 2 files changed, 14 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index fe35c72..133d00d 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -352,6 +352,13 @@ status = "disabled"; }; + kbc { + compatible = "nvidia,tegra20-kbc"; + reg = <0x7000e200 0x100>; + interrupts = <0 85 0x04>; + status = "disabled"; + }; + pmc { compatible = "nvidia,tegra20-pmc"; reg = <0x7000e400 0x400>; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index f534a50..bc9f702 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -368,6 +368,13 @@ status = "disabled"; }; + kbc { + compatible = "nvidia,tegra30-kbc", nvidia,tegra20-kbc"; + reg = <0x7000e200 0x100>; + interrupts = <0 85 0x04>; + status = "disabled"; + }; + pmc { compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc"; reg = <0x7000e400 0x400>;