From patchwork Fri Jan 4 14:26:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 1933221 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 2A03B3FDDA for ; Fri, 4 Jan 2013 14:29:45 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Tr8EL-0005qd-6Z; Fri, 04 Jan 2013 14:26:41 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Tr8EH-0005qK-Qn for linux-arm-kernel@lists.infradead.org; Fri, 04 Jan 2013 14:26:38 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r04EQaRj003614; Fri, 4 Jan 2013 08:26:36 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id r04EQatu000555; Fri, 4 Jan 2013 08:26:36 -0600 Received: from dlelxv22.itg.ti.com (172.17.1.197) by dfle72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.1.323.3; Fri, 4 Jan 2013 08:26:36 -0600 Received: from [172.24.79.27] (h79-27.vpn.ti.com [172.24.79.27]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r04EQZE3003311; Fri, 4 Jan 2013 08:26:35 -0600 Subject: Re: [PATCH 00/12] ARM: OMAP2+: powerdomain updates after the functional power state conversion From: Tero Kristo To: Paul Walmsley In-Reply-To: <20121209200108.3196.12452.stgit@dusk.lan> References: <20121209200108.3196.12452.stgit@dusk.lan> Organization: Texas Instruments Date: Fri, 4 Jan 2013 16:26:34 +0200 Message-ID: <1357309594.2221.112.camel@sokoban> MIME-Version: 1.0 X-Mailer: Evolution 2.32.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130104_092638_097327_73B07A38 X-CRM114-Status: GOOD ( 14.06 ) X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.152 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list Reply-To: t-kristo@ti.com List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Hi Paul, Tested this whole set on omap3beagle and omap4panda. The only regression I noticed was that cpu0 debug counters do not increment on omap4 after this set. The patch at the end fixes this problem. Other than that, you can add acked-by tag from me if you want, I went the code through quickly and don't have any comments to it. -Tero From: Tero Kristo Date: Thu, 3 Jan 2013 20:07:27 +0200 Subject: [PATCH] ARM: OMAP4: PM: fix cpu0 statistics update during idle Cpu0 PM counters do not update, as the cpu0 fpwrst is set to ON before calling pwrdm_post_transition. The optimized code checks whether the fpwrst is ON, and skips any further checks if this is the case. Fixed by re-ordering the code within omap4_mpuss_enter_lowpower function. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/omap-mpuss-lowpower.c | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c index 9acd52a..1bdd59e 100644 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c @@ -269,10 +269,16 @@ int omap4_mpuss_enter_lowpower(unsigned int cpu, u8 fpwrst) * domain transition */ wakeup_cpu = smp_processor_id(); - WARN_ON(pwrdm_set_next_fpwrst(pm_info->pwrdm, PWRDM_FUNC_PWRST_ON)); + /* + * Due to optimizations to the code, pwrdm_post_transition + * must be called prior to resetting cpu0 pwrst to ON, + * otherwise cpu0 powerstate statistics don't update properly + */ pwrdm_post_transition(NULL); + WARN_ON(pwrdm_set_next_fpwrst(pm_info->pwrdm, PWRDM_FUNC_PWRST_ON)); + return 0; }