From patchwork Fri Jan 18 07:31:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 1999731 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 27407DF280 for ; Fri, 18 Jan 2013 07:35:58 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Tw6SI-0006Qd-R7; Fri, 18 Jan 2013 07:33:38 +0000 Received: from mail-pa0-f54.google.com ([209.85.220.54]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Tw6QY-0005cO-Tz for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2013 07:31:51 +0000 Received: by mail-pa0-f54.google.com with SMTP id bi5so1956980pad.13 for ; Thu, 17 Jan 2013 23:31:49 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=+HtHaZmkCvs69V7R1HdqrTax41tda6XG8bok4OmmUkU=; b=bhN/zz9tixZYUfmBdmERNqVdryziwic+FVnDoe4qHGlvUmbIEqW8D5MwF3x9Cgt+FR blsfu1KwdNpjFZFFBgQFzZvMk8C1+Gf4hs49aee6jI1cDZAtpZ/uyZeRjpGCnD6SQ6xu AZxRdOG7aVhouVNyuPuodCFnV9AYiAN8uBIbSmFpdevNVsFWWjHKqsTCJaupSXcYvvuS Skas0miKRG7RPrBjzDs3LucF2e4f5/Q2yxK9y0FDhEBjmxlRu4G08yzh3HIwnPZ1bryZ T1b3JrwjyArAxyJpVBGXA1XPfgnLiGqttWf8p19tW9GAWko1ohbT/9A4ccrbrnBNI8hC Vsfg== X-Received: by 10.66.80.70 with SMTP id p6mr21343153pax.23.1358494309170; Thu, 17 Jan 2013 23:31:49 -0800 (PST) Received: from localhost.localdomain ([98.126.173.75]) by mx.google.com with ESMTPS id i6sm2922899paw.19.2013.01.17.23.31.46 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 17 Jan 2013 23:31:48 -0800 (PST) From: Haojian Zhuang To: linus.walleij@linaro.org, linux@arm.linux.org.uk, tony@atomide.com, linux-arm-kernel@lists.infradead.org, swarren@nvidia.com Subject: [PATCH v7 06/15] gpio: find gpio base by ascend order Date: Fri, 18 Jan 2013 15:31:10 +0800 Message-Id: <1358494279-16503-7-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1358494279-16503-1-git-send-email-haojian.zhuang@linaro.org> References: <1358494279-16503-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQkvcitxyGPO6r1emHmMq8Rgpo5WVpmeNpZ2ZnINo5CPCC+tOTyQtgP67lg/XhGaCC7SEmDM X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130118_023151_051464_8B601103 X-CRM114-Status: GOOD ( 11.09 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.54 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Haojian Zhuang X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org gpiochip_find_base() always tries to find valid gpio with descend order. It's inconvient if gpio information is passing from DTS. Now try to find valid gpio with ascend order. Signed-off-by: Haojian Zhuang --- drivers/gpio/gpiolib.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 199fca1..8af57e7 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -128,20 +128,21 @@ static int gpiochip_find_base(int ngpio) int spare = 0; int base = -ENOSPC; - for (i = ARCH_NR_GPIOS - 1; i >= 0 ; i--) { + for (i = 0, base = 0; i < ARCH_NR_GPIOS; i++) { struct gpio_desc *desc = &gpio_desc[i]; struct gpio_chip *chip = desc->chip; - if (!chip && !test_bit(FLAG_RESERVED, &desc->flags)) { + if (chip) { + spare = 0; + i += chip->ngpio - 1; + base = i + 1; + } else if (test_bit(FLAG_RESERVED, &desc->flags)) { + spare = 0; + base = i + 1; + } else { spare++; - if (spare == ngpio) { - base = i; + if (spare == ngpio) break; - } - } else { - spare = 0; - if (chip) - i -= chip->ngpio - 1; } }