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[72.254.49.219]) by mx.google.com with ESMTPS id pu5sm8416294pbb.73.2013.01.21.02.03.05 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 21 Jan 2013 02:03:05 -0800 (PST) From: Thomas Abraham To: devicetree-discuss@lists.ozlabs.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v4 5/7] ARM: dts: add mct device tree node for all supported Exynos SoC's Date: Mon, 21 Jan 2013 02:02:20 -0800 Message-Id: <1358762542-19008-6-git-send-email-thomas.abraham@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1358762542-19008-1-git-send-email-thomas.abraham@linaro.org> References: <1358762542-19008-1-git-send-email-thomas.abraham@linaro.org> X-Gm-Message-State: ALoCoQnmpE1D+RHK0fv4pOMSS3FCHfH1xebxgHn76gBdLgtbT4bR0myfO59IR1FhZA2UsgUOtyKc X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130121_050308_421143_23ABDD29 X-CRM114-Status: GOOD ( 10.00 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.44 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: kgene.kim@samsung.com, swarren@nvidia.com, t.figa@samsung.com, olof@lixom.net, sylvester.nawrocki@gmail.com, chaos.youn@samsung.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add MCT device tree node for Exynos4210, Exynos4212, Exynos4412 and Exynos5250. Cc: Changhwan Youn Signed-off-by: Thomas Abraham --- arch/arm/boot/dts/exynos4210.dtsi | 7 +++++++ arch/arm/boot/dts/exynos4212.dtsi | 9 +++++++++ arch/arm/boot/dts/exynos4412.dtsi | 7 +++++++ arch/arm/boot/dts/exynos5250.dtsi | 20 ++++++++++++++++++++ 4 files changed, 43 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 89c7dd0..b1c76fa 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -47,6 +47,13 @@ <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>; }; + mct@10050000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, + <0 42 0>, <0 48 0>; + }; + pmu { compatible = "arm,cortex-a9-pmu"; interrupt-parent = <&combiner>; diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi index c6ae200..113adcf 100644 --- a/arch/arm/boot/dts/exynos4212.dtsi +++ b/arch/arm/boot/dts/exynos4212.dtsi @@ -25,4 +25,13 @@ gic:interrupt-controller@10490000 { cpu-offset = <0x8000>; }; + + mct@10050000 { + compatible = "samsung,exynos4412-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, + <1 12 0>, <1 12 0>; + }; + + }; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index d7dfe31..78ed377 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -25,4 +25,11 @@ gic:interrupt-controller@10490000 { cpu-offset = <0x4000>; }; + + mct@10050000 { + compatible = "samsung,exynos4412-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, + <1 12 0>, <1 12 0>, <1 12 0>, <1 12 0>; + }; }; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 30485de..7e8fcaf 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -69,6 +69,26 @@ <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; }; + mct@101C0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101C0000 0x800>; + interrupt-controller; + #interrups-cells = <2>; + interrupt-parent = <&mct_map>; + interrupts = <0 0>, <0 0>, <0 0>, <0 0>, + <4 0>, <5 0>; + + mct_map: mct-map { + compatible = "samsung,mct-map"; + #interrupt-cells = <2>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0x0 0 &combiner 23 3>, + <0x4 0 &gic 0 120 0>, + <0x5 0 &gic 0 121 0>; + }; + }; + pmu { compatible = "arm,cortex-a15-pmu"; interrupt-parent = <&combiner>;