From patchwork Wed Jan 23 08:25:52 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 2022861 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 851253FD86 for ; Wed, 23 Jan 2013 08:31:10 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TxvhP-0001Zn-75; Wed, 23 Jan 2013 08:28:47 +0000 Received: from mail-pa0-f51.google.com ([209.85.220.51]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TxvfD-0000ML-99 for linux-arm-kernel@lists.infradead.org; Wed, 23 Jan 2013 08:26:32 +0000 Received: by mail-pa0-f51.google.com with SMTP id fb11so4594424pad.38 for ; Wed, 23 Jan 2013 00:26:30 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=knUew0GhgeoJTbtrC/wyIZFKsya5IFeBreZGGaYWkB0=; b=WAdYi9qLIjhWyneXOlfu+XufDxYDTfRO77WopmWBvmB+LzMIsjX83ZIKkhdW9JATvK Ey1hfbeXBo74UA2EkyB3y+v6lqSxKOql/qtwPuRAz6Q9TIuRPH09ZqUBh2SZPUTacZ1G GyRuiI7RByijfMvM3c/oTM+saReC89sOeFXbcHhaa9UYuZ8A0uw+okv8OXa+cIrpL18F dRZbmufzn+rVDFebjgBSCezd3lI0IUKQzHLvTNms6udTpMYQaPPxovvepvqOlA77VJTd +P6VM/FxaAGv67c8O9V/vRo1+8EsR9uwc3PdG2JFSNVZTqhdm9Py/6ZykJ4tnNZWRpNI 6tRg== X-Received: by 10.68.252.4 with SMTP id zo4mr1243037pbc.126.1358929590440; Wed, 23 Jan 2013 00:26:30 -0800 (PST) Received: from localhost.localdomain ([98.126.173.75]) by mx.google.com with ESMTPS id qf7sm12392126pbb.49.2013.01.23.00.26.27 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 23 Jan 2013 00:26:29 -0800 (PST) From: Haojian Zhuang To: linux@arm.linux.org.uk, marek.vasut@gmail.com, robert.jarzmik@free.fr, daniel@caiaq.de, linux-arm-kernel@lists.infradead.org, linus.walleij@linaro.org, grant.likely@secretlab.ca, cxie4@marvell.com Subject: [PATCH 08/10] gpio: pxa: remove arch related macro Date: Wed, 23 Jan 2013 16:25:52 +0800 Message-Id: <1358929554-32265-9-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1358929554-32265-1-git-send-email-haojian.zhuang@linaro.org> References: <1358929554-32265-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQkS6P1oC/xeBviX9AoaarNqUoG0t9BlXNegjlod7dPE+kFAwKryqQ98lRKeaoER6ltqWsIZ X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130123_032631_450646_44A38784 X-CRM114-Status: GOOD ( 10.64 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.51 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Haojian Zhuang , patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Remove macro CONFIG_ARCH_PXA. Signed-off-by: Haojian Zhuang --- drivers/gpio/gpio-pxa.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c index 5870944..21cf8fd 100644 --- a/drivers/gpio/gpio-pxa.c +++ b/drivers/gpio/gpio-pxa.c @@ -570,21 +570,21 @@ static int pxa_gpio_probe(struct platform_device *pdev) } if (!use_of) { -#ifdef CONFIG_ARCH_PXA - irq = gpio_to_irq(0); - irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, - handle_edge_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - irq_set_chained_handler(IRQ_GPIO0, pxa_gpio_demux_handler); - - irq = gpio_to_irq(1); - irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, - handle_edge_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler); -#endif - - for (irq = gpio_to_irq(gpio_offset); + if (irq0 > 0) { + irq = gpio_to_irq(0); + irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, + handle_edge_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + irq_set_chained_handler(irq0, pxa_gpio_demux_handler); + } + if (irq1 > 0) { + irq = gpio_to_irq(1); + irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, + handle_edge_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + irq_set_chained_handler(irq1, pxa_gpio_demux_handler); + } + for (irq = gpio_to_irq(gpio_offset); irq <= gpio_to_irq(pxa_last_gpio); irq++) { irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, handle_edge_irq);