From patchwork Thu Jan 24 16:07:31 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 2033471 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 05E93DF264 for ; Thu, 24 Jan 2013 16:10:51 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TyPLM-0005tM-Ay; Thu, 24 Jan 2013 16:08:01 +0000 Received: from moutng.kundenserver.de ([212.227.126.187]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TyPLA-0005ja-GE for linux-arm-kernel@lists.infradead.org; Thu, 24 Jan 2013 16:07:49 +0000 Received: from axis700.grange (dslb-094-221-098-036.pools.arcor-ip.net [94.221.98.36]) by mrelayeu.kundenserver.de (node=mreu1) with ESMTP (Nemesis) id 0MLkF5-1TygaS3rkZ-000XaI; Thu, 24 Jan 2013 17:07:44 +0100 Received: from 6a.grange (6a.grange [192.168.1.11]) by axis700.grange (Postfix) with ESMTPS id 76B8B40B99; Thu, 24 Jan 2013 17:07:43 +0100 (CET) Received: from lyakh by 6a.grange with local (Exim 4.72) (envelope-from ) id 1TyPL5-0002y2-37; Thu, 24 Jan 2013 17:07:43 +0100 From: Guennadi Liakhovetski To: linux-sh@vger.kernel.org Subject: [PATCH 1/3] pinctrl: add ethernet pin groups to r8a7740 Date: Thu, 24 Jan 2013 17:07:31 +0100 Message-Id: <1359043653-11374-2-git-send-email-g.liakhovetski@gmx.de> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1359043653-11374-1-git-send-email-g.liakhovetski@gmx.de> References: <1359043653-11374-1-git-send-email-g.liakhovetski@gmx.de> X-Provags-ID: V02:K0:c1zFN3P3osd01KzNsCni3CZbIcTunbr1OnqaGtpZqNg TyBJzau0C1DJnGzeaG1M83ZGlg+q82lC5ZAw6gvSPfSMy5WqgM r+l2QRC1FstSSoabdCKdCi+JiFmxl/qMUWKxKXkXSeNhHAN5qF KnhKNkBiq9/0EBUYVG8NaUcbOIvVKUu1djaqNKDzghR52Zov9T AT/Py4AWjTwxRUafwCdxcCgi0QgUffOES072TcSWoh0iIzWg8a w9aE/uwMieLYAq/EaQonwjK4Roh45AtgGQERHrf28pUvo23mxM M/FOoEAs1k/dVBXZqoTQILsjzwQbCenyWMnAqQFIY5Q0q5oAV0 BThz1fZe/YoPXSmBs98/ZizG5CGBLZkE/QgiXpaZK0kC+nClWb JItw5xz6w+tnQ== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130124_110748_799443_4517BD21 X-CRM114-Status: GOOD ( 11.29 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (g.liakhovetski[at]gmx.de) -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [212.227.126.187 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Simon Horman , Magnus Damm , Guennadi Liakhovetski , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org r8a7740 SoCs have an integrated gigabit ethernet MAC. This patch adds two pin groups: base for 100mbps and additional pins for the gigabit mode. Signed-off-by: Guennadi Liakhovetski --- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 31 +++++++++++++++++++++++++++++++ 1 files changed, 31 insertions(+), 0 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c index 4c92af8..d7f69dd 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c @@ -2052,6 +2052,29 @@ static const unsigned int mmc0_ctrl_1_mux[] = { MMC1_CMD_PORT104_MARK, MMC1_CLK_PORT103_MARK, }; +static const unsigned int eth_base_pins[] = { + 203, 204, 205, 206, 207, + 183, 184, + 185, 186, 187, 188, + 171, 170, 169, 168, + 161, 163, 164, 174, +}; +static const unsigned int eth_base_mux[] = { + ET_TX_ER_MARK, ET_RX_ER_MARK, ET_CRS_MARK, ET_MDC_MARK, ET_MDIO_MARK, + ET_TX_EN_MARK, ET_TX_CLK_MARK, + ET_ERXD0_MARK, ET_ERXD1_MARK, ET_ERXD2_MARK, ET_ERXD3_MARK, + ET_ETXD0_MARK, ET_ETXD1_MARK, ET_ETXD2_MARK, ET_ETXD3_MARK, + ET_RX_DV_MARK, ET_COL_MARK, ET_PHY_INT_MARK, ET_RX_CLK_MARK, +}; +static const unsigned int eth_gbit_pins[] = { + 189, 190, 191, 192, + 167, 166, 173, 172, +}; +static const unsigned int eth_gbit_mux[] = { + ET_ERXD4_MARK, ET_ERXD5_MARK, ET_ERXD6_MARK, ET_ERXD7_MARK, + ET_ETXD4_MARK, ET_ETXD5_MARK, ET_ETXD6_MARK, ET_ETXD7_MARK, +}; + static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(lcd0_data8), SH_PFC_PIN_GROUP(lcd0_data9), @@ -2100,6 +2123,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(mmc0_data4_1), SH_PFC_PIN_GROUP(mmc0_data8_1), SH_PFC_PIN_GROUP(mmc0_ctrl_1), + SH_PFC_PIN_GROUP(eth_base), + SH_PFC_PIN_GROUP(eth_gbit), }; static const char * const lcd0_groups[] = { @@ -2167,6 +2192,11 @@ static const char * const mmc0_groups[] = { "mmc0_ctrl_1", }; +static const char * const eth_groups[] = { + "eth_base", + "eth_gbit", +}; + static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(lcd0), SH_PFC_FUNCTION(lcd1), @@ -2174,6 +2204,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(sdhi1), SH_PFC_FUNCTION(sdhi2), SH_PFC_FUNCTION(mmc0), + SH_PFC_FUNCTION(eth), }; #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)