From patchwork Tue Jan 29 21:41:35 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 2064071 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 31090DF23E for ; Tue, 29 Jan 2013 21:44:27 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U0IwD-0001rS-Ca; Tue, 29 Jan 2013 21:41:53 +0000 Received: from mail-bk0-f53.google.com ([209.85.214.53]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U0IwA-0001qi-42 for linux-arm-kernel@lists.infradead.org; Tue, 29 Jan 2013 21:41:51 +0000 Received: by mail-bk0-f53.google.com with SMTP id j10so533144bkw.12 for ; Tue, 29 Jan 2013 13:41:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=/PX6qtdwg9Nd3K5o2gNjn4ta439pS8Gcsui5rBOPbR4=; b=CVpNvGN+5vAqG0LUf0qEomazJj2JhRMDcG00qHax3R2yU6DOrTKsJy7kpmQuZjaFB9 m6sl2+tZ+O1gWlwJdgay4Uk11A/za2A/L82Pihnzxq7YO26KZ0GG+TuIfKM3JqQGlY/S IL0XiHiQQ8EvxSFx6MWIY7/ij7p0y6p3Us4O3gjHmeP1NOPEc0l0CbqdySnHDOmtDytc eJiLfpoKdMwHYjxTgJbAawxG4Ikr/muwEE9wK+UmYh+C5ea1cGjtMV99ZKNVTs8faMwR kPCLeqqTtGQUFhIkZjGrsqMFZekLjUdvRvfYmYFZAEas8ies2q1Mg64MrWQWewI+FKnx hYhg== X-Received: by 10.204.147.135 with SMTP id l7mr725759bkv.119.1359495708300; Tue, 29 Jan 2013 13:41:48 -0800 (PST) Received: from nijin.lan (dslc-082-083-232-148.pools.arcor-ip.net. [82.83.232.148]) by mx.google.com with ESMTPS id c10sm10066755bkw.1.2013.01.29.13.41.46 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 29 Jan 2013 13:41:47 -0800 (PST) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [PATCH v3 2/2] ARM: dove: split legacy and DT setup Date: Tue, 29 Jan 2013 22:41:35 +0100 Message-Id: <1359495695-29304-1-git-send-email-sebastian.hesselbarth@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <20130129212623.GJ7717@titan.lakedaemon.net> References: <20130129212623.GJ7717@titan.lakedaemon.net> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130129_164150_383199_CBC90448 X-CRM114-Status: GOOD ( 20.34 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.214.53 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (sebastian.hesselbarth[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Andrew Lunn , Russell King , Jason Cooper , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org In the beginning of DT for Dove it was reasonable to have it close to non-DT code. With improved DT support, it became more and more difficult to not break non-DT while changing DT code. This patch splits up DT board setup and introduces a DOVE_LEGACY config to allow to remove legacy code for DT-only kernels. Signed-off-by: Sebastian Hesselbarth --- Changelog: [v3] - also include new board-dt.c file that was missing in v2 of patch [2/2] (patch [1/2] has not changed and is not resent) Cc: Russell King Cc: Jason Cooper Cc: Andrew Lunn Cc: Sebastian Hesselbarth Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- arch/arm/mach-dove/Kconfig | 5 ++ arch/arm/mach-dove/Makefile | 4 +- arch/arm/mach-dove/board-dt.c | 103 +++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-dove/common.c | 90 ----------------------------------- arch/arm/mach-dove/common.h | 1 + 5 files changed, 112 insertions(+), 91 deletions(-) create mode 100644 arch/arm/mach-dove/board-dt.c diff --git a/arch/arm/mach-dove/Kconfig b/arch/arm/mach-dove/Kconfig index 603c5fd..aedd0ba 100644 --- a/arch/arm/mach-dove/Kconfig +++ b/arch/arm/mach-dove/Kconfig @@ -2,8 +2,12 @@ if ARCH_DOVE menu "Marvell Dove Implementations" +config DOVE_LEGACY + bool + config MACH_DOVE_DB bool "Marvell DB-MV88AP510 Development Board" + select DOVE_LEGACY select I2C_BOARDINFO help Say 'Y' here if you want your kernel to support the @@ -11,6 +15,7 @@ config MACH_DOVE_DB config MACH_CM_A510 bool "CompuLab CM-A510 Board" + select DOVE_LEGACY help Say 'Y' here if you want your kernel to support the CompuLab CM-A510 Board. diff --git a/arch/arm/mach-dove/Makefile b/arch/arm/mach-dove/Makefile index 5e683ba..3f0a858 100644 --- a/arch/arm/mach-dove/Makefile +++ b/arch/arm/mach-dove/Makefile @@ -1,4 +1,6 @@ -obj-y += common.o addr-map.o irq.o mpp.o +obj-y += common.o addr-map.o irq.o +obj-$(CONFIG_DOVE_LEGACY) += mpp.o obj-$(CONFIG_PCI) += pcie.o obj-$(CONFIG_MACH_DOVE_DB) += dove-db-setup.o +obj-$(CONFIG_MACH_DOVE_DT) += board-dt.o obj-$(CONFIG_MACH_CM_A510) += cm-a510.o diff --git a/arch/arm/mach-dove/board-dt.c b/arch/arm/mach-dove/board-dt.c new file mode 100644 index 0000000..c9c274a --- /dev/null +++ b/arch/arm/mach-dove/board-dt.c @@ -0,0 +1,103 @@ +/* + * arch/arm/mach-dove/board-dt.c + * + * Marvell Dove 88AP510 System On Chip FDT Board + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "common.h" + +/* + * There are still devices that doesn't even know about DT, + * get clock gates here and add a clock lookup. + */ +static void __init dove_legacy_clk_init(void) +{ + struct device_node *np = of_find_compatible_node(NULL, NULL, + "marvell,dove-gating-clock"); + struct of_phandle_args clkspec; + + clkspec.np = np; + clkspec.args_count = 1; + + clkspec.args[0] = CLOCK_GATING_BIT_USB0; + orion_clkdev_add(NULL, "orion-ehci.0", + of_clk_get_from_provider(&clkspec)); + + clkspec.args[0] = CLOCK_GATING_BIT_USB1; + orion_clkdev_add(NULL, "orion-ehci.1", + of_clk_get_from_provider(&clkspec)); + + clkspec.args[0] = CLOCK_GATING_BIT_GBE; + orion_clkdev_add(NULL, "mv643xx_eth_port.0", + of_clk_get_from_provider(&clkspec)); + + clkspec.args[0] = CLOCK_GATING_BIT_PCIE0; + orion_clkdev_add("0", "pcie", + of_clk_get_from_provider(&clkspec)); + + clkspec.args[0] = CLOCK_GATING_BIT_PCIE1; + orion_clkdev_add("1", "pcie", + of_clk_get_from_provider(&clkspec)); +} + +static void __init dove_of_clk_init(void) +{ + mvebu_clocks_init(); + dove_legacy_clk_init(); +} + +static struct mv643xx_eth_platform_data dove_dt_ge00_data = { + .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT, +}; + +static void __init dove_dt_init(void) +{ + pr_info("Dove 88AP510 SoC\n"); + +#ifdef CONFIG_CACHE_TAUROS2 + tauros2_init(0); +#endif + dove_setup_cpu_mbus(); + + /* Setup root of clk tree */ + dove_of_clk_init(); + + /* Internal devices not ported to DT yet */ + dove_rtc_init(); + dove_ge00_init(&dove_dt_ge00_data); + dove_ehci0_init(); + dove_ehci1_init(); + dove_pcie_init(1, 1); + + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); +} + +static const char * const dove_dt_board_compat[] = { + "marvell,dove", + NULL +}; + +DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)") + .map_io = dove_map_io, + .init_early = dove_init_early, + .init_irq = orion_dt_init_irq, + .timer = &dove_timer, + .init_machine = dove_dt_init, + .restart = dove_restart, + .dt_compat = dove_dt_board_compat, +MACHINE_END diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index be887feea..aea14b4 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c @@ -9,22 +9,17 @@ */ #include -#include #include #include -#include -#include #include #include #include #include -#include #include #include #include #include #include -#include #include #include "common.h" @@ -364,88 +359,3 @@ void dove_restart(char mode, const char *cmd) while (1) ; } - -#if defined(CONFIG_MACH_DOVE_DT) -/* - * There are still devices that doesn't even know about DT, - * get clock gates here and add a clock lookup. - */ -static void __init dove_legacy_clk_init(void) -{ - struct device_node *np = of_find_compatible_node(NULL, NULL, - "marvell,dove-gating-clock"); - struct of_phandle_args clkspec; - - clkspec.np = np; - clkspec.args_count = 1; - - clkspec.args[0] = CLOCK_GATING_BIT_USB0; - orion_clkdev_add(NULL, "orion-ehci.0", - of_clk_get_from_provider(&clkspec)); - - clkspec.args[0] = CLOCK_GATING_BIT_USB1; - orion_clkdev_add(NULL, "orion-ehci.1", - of_clk_get_from_provider(&clkspec)); - - clkspec.args[0] = CLOCK_GATING_BIT_GBE; - orion_clkdev_add(NULL, "mv643xx_eth_port.0", - of_clk_get_from_provider(&clkspec)); - - clkspec.args[0] = CLOCK_GATING_BIT_PCIE0; - orion_clkdev_add("0", "pcie", - of_clk_get_from_provider(&clkspec)); - - clkspec.args[0] = CLOCK_GATING_BIT_PCIE1; - orion_clkdev_add("1", "pcie", - of_clk_get_from_provider(&clkspec)); -} - -static void __init dove_of_clk_init(void) -{ - mvebu_clocks_init(); - dove_legacy_clk_init(); -} - -static struct mv643xx_eth_platform_data dove_dt_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT, -}; - -static void __init dove_dt_init(void) -{ - pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n", - (dove_tclk + 499999) / 1000000); - -#ifdef CONFIG_CACHE_TAUROS2 - tauros2_init(0); -#endif - dove_setup_cpu_mbus(); - - /* Setup root of clk tree */ - dove_of_clk_init(); - - /* Internal devices not ported to DT yet */ - dove_rtc_init(); - - dove_ge00_init(&dove_dt_ge00_data); - dove_ehci0_init(); - dove_ehci1_init(); - dove_pcie_init(1, 1); - - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); -} - -static const char * const dove_dt_board_compat[] = { - "marvell,dove", - NULL -}; - -DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)") - .map_io = dove_map_io, - .init_early = dove_init_early, - .init_irq = orion_dt_init_irq, - .timer = &dove_timer, - .init_machine = dove_dt_init, - .restart = dove_restart, - .dt_compat = dove_dt_board_compat, -MACHINE_END -#endif diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h index 1a23340..d17f760 100644 --- a/arch/arm/mach-dove/common.h +++ b/arch/arm/mach-dove/common.h @@ -25,6 +25,7 @@ void dove_init_early(void); void dove_init_irq(void); void dove_setup_cpu_mbus(void); void dove_ge00_init(struct mv643xx_eth_platform_data *eth_data); +void dove_rtc_init(void); void dove_sata_init(struct mv_sata_platform_data *sata_data); #ifdef CONFIG_PCI void dove_pcie_init(int init_port0, int init_port1);