From patchwork Thu Jan 31 12:15:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 2073371 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 0BB0FDF2E5 for ; Thu, 31 Jan 2013 12:36:30 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U0tLZ-0000zw-GJ; Thu, 31 Jan 2013 12:34:29 +0000 Received: from service87.mimecast.com ([91.220.42.44]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U0t58-0005ry-F4 for linux-arm-kernel@lists.infradead.org; Thu, 31 Jan 2013 12:17:31 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Thu, 31 Jan 2013 12:17:26 +0000 Received: from e106331-lin.cambridge.arm.com ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.0); Thu, 31 Jan 2013 12:17:25 +0000 From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Subject: [PATCHv5 09/16] arm: arch_timer: add arch_counter_set_user_access Date: Thu, 31 Jan 2013 12:15:32 +0000 Message-Id: <1359634539-9580-10-git-send-email-mark.rutland@arm.com> X-Mailer: git-send-email 1.8.1.1 In-Reply-To: <1359634539-9580-1-git-send-email-mark.rutland@arm.com> References: <1359634539-9580-1-git-send-email-mark.rutland@arm.com> X-OriginalArrivalTime: 31 Jan 2013 12:17:25.0573 (UTC) FILETIME=[EDFB2750:01CDFFAC] X-MC-Unique: 113013112172610701 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130131_071730_903811_6445656D X-CRM114-Status: UNSURE ( 9.09 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [91.220.42.44 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: mark.rutland@arm.com, c.dall@virtualopensystems.com, swarren@nvidia.com, marc.zyngier@arm.com, catalin.marinas@arm.com, sboyd@codeaurora.org, will.deacon@arm.com, santosh.shilimkar@ti.com, thomas.abraham@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Several bits in CNTKCTL reset to 0, including PL0VTEN. For architectures using the generic timer which wish to have a fast gettimeofday vDSO implementation, these bits must be set to 1 by the kernel. For architectures without a vDSO, it's best to leave the bits set to 0 for now to ensure that if and when support is added, it's implemented sanely architecture wide. As the bootloader might set PL0VTEN to a value that doesn't correspond to that which the kernel prefers, we must explicitly set it to the architecture port's preferred value. This patch adds arch_counter_set_user_access, which sets the PL0 access permissions to that required by the architecture. For arch/arm, this currently means disabling all userspace access. Signed-off-by: Mark Rutland Acked-by: Catalin Marinas --- arch/arm/include/asm/arch_timer.h | 12 ++++++++++++ arch/arm/kernel/arch_timer.c | 2 ++ 2 files changed, 14 insertions(+) diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h index 75975d9..729f6d9 100644 --- a/arch/arm/include/asm/arch_timer.h +++ b/arch/arm/include/asm/arch_timer.h @@ -106,6 +106,18 @@ static inline u64 arch_counter_get_cntvct(void) asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (cval)); return cval; } + +static inline void __cpuinit arch_counter_set_user_access(void) +{ + u32 cntkctl; + + asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl)); + + /* disable user access to everything */ + cntkctl &= ~((3 << 8) | (7 << 0)); + + asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl)); +} #else static inline int arch_timer_of_register(void) { diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c index c8dfec0..94f5033 100644 --- a/arch/arm/kernel/arch_timer.c +++ b/arch/arm/kernel/arch_timer.c @@ -155,6 +155,8 @@ static int __cpuinit arch_timer_setup(struct clock_event_device *clk) enable_percpu_irq(arch_timer_ppi[PHYS_NONSECURE_PPI], 0); } + arch_counter_set_user_access(); + return 0; }