From patchwork Fri Feb 1 10:28:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "AnilKumar, Chimata" X-Patchwork-Id: 2078341 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id A06A5DFE75 for ; Fri, 1 Feb 2013 10:31:00 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U1DrD-0004IL-L2; Fri, 01 Feb 2013 10:28:31 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U1DrA-0004Fx-5L for linux-arm-kernel@lists.infradead.org; Fri, 01 Feb 2013 10:28:28 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r11ASP8C022317; Fri, 1 Feb 2013 04:28:25 -0600 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r11ASOX1014441; Fri, 1 Feb 2013 15:58:24 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Fri, 1 Feb 2013 15:58:24 +0530 Received: from localhost.localdomain (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id r11ASOPQ007820; Fri, 1 Feb 2013 15:58:24 +0530 From: AnilKumar Ch To: Subject: [PATCH] ARM: OMAP2: AM33XX: id: Add support for AM335x PG2.0 Date: Fri, 1 Feb 2013 15:58:22 +0530 Message-ID: <1359714502-21528-1-git-send-email-anilkumar@ti.com> X-Mailer: git-send-email 1.7.0.4 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130201_052828_441663_73D0BCCF X-CRM114-Status: GOOD ( 10.64 ) X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.152 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: AnilKumar Ch , linux-omap@vger.kernel.org, b-cousson@ti.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add support for chip id recognition of AM335x PG2.0 silicon. By default omap3xxx_check_revision() recognizes PG1.0, which is extended by adding PG2.0 support Signed-off-by: AnilKumar Ch --- arch/arm/mach-omap2/id.c | 14 ++++++++++++-- arch/arm/mach-omap2/soc.h | 1 + 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 45cc7ed4..8a68f1e 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -399,8 +399,18 @@ void __init omap3xxx_check_revision(void) } break; case 0xb944: - omap_revision = AM335X_REV_ES1_0; - cpu_rev = "1.0"; + switch (rev) { + case 0: + omap_revision = AM335X_REV_ES1_0; + cpu_rev = "1.0"; + break; + case 1: + /* FALLTHROUGH */ + default: + omap_revision = AM335X_REV_ES2_0; + cpu_rev = "2.0"; + break; + } break; case 0xb8f2: switch (rev) { diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index 092aedd..c62116b 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -395,6 +395,7 @@ IS_OMAP_TYPE(3430, 0x3430) #define AM335X_CLASS 0x33500033 #define AM335X_REV_ES1_0 AM335X_CLASS +#define AM335X_REV_ES2_0 (AM335X_CLASS | (0x1 << 8)) #define OMAP443X_CLASS 0x44300044 #define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))