From patchwork Sat Feb 2 16:29:24 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Courbot X-Patchwork-Id: 2084431 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 3C627DFE75 for ; Sat, 2 Feb 2013 16:31:40 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U1fwL-0001l9-Lr; Sat, 02 Feb 2013 16:27:41 +0000 Received: from mail-da0-f46.google.com ([209.85.210.46]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U1fw8-0001in-65 for linux-arm-kernel@lists.infradead.org; Sat, 02 Feb 2013 16:27:28 +0000 Received: by mail-da0-f46.google.com with SMTP id p5so2101107dak.19 for ; Sat, 02 Feb 2013 08:27:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=3/PBLjBAIlnYlGnujzZlsp+s9txLIFAbrO2wIlqepso=; b=AujpYfAHol05/VO6JLVsphRUetDUpa9G124dS2KblRWppmuQmwJILrhMl+TU7kQBXI fq0HBaPVkc7CGUTba62oGrMfoGPExUfxVnZmQhxez7DRsNaRM4fiLVXOAZU9dA2XyA23 BSMuwYL4L1k1TcCZKut6UmQhX4lAcyCjW4AaYwOteDt/D4Acuft02SUwkk2+zg974PcB buDTJPDgprmQA0AcjpfpjhkQDM966iQjpUESYjouM8r9vLA63rsek4QEhrhUckknUY6o 3mDRRpUfEni45rv0zfx3NQr3pN5AjxUGg5YbmUJtYf+dK5uc32Ql7yaaQyR7FQvGRU/+ 6oCQ== X-Received: by 10.68.136.2 with SMTP id pw2mr41564245pbb.97.1359822446659; Sat, 02 Feb 2013 08:27:26 -0800 (PST) Received: from localhost.localdomain (softbank126010191003.bbtec.net. [126.10.191.3]) by mx.google.com with ESMTPS id vn2sm12100769pbc.31.2013.02.02.08.27.24 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 02 Feb 2013 08:27:26 -0800 (PST) From: Alexandre Courbot To: Grant Likely , Linus Walleij , Arnd Bergmann Subject: [PATCH 1/9] gpiolib: link all gpio_chips using a list Date: Sun, 3 Feb 2013 01:29:24 +0900 Message-Id: <1359822572-26009-3-git-send-email-acourbot@nvidia.com> X-Mailer: git-send-email 1.8.1.1 In-Reply-To: <1359822572-26009-1-git-send-email-acourbot@nvidia.com> References: <1359822572-26009-1-git-send-email-acourbot@nvidia.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130202_112728_299604_7E1DE79A X-CRM114-Status: GOOD ( 21.30 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.46 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (gnurou[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: linux-arch@vger.kernel.org, gnurou@gmail.com, Alexandre Courbot , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add a list member to gpio_chip that allows all chips to be parsed quickly. The current method requires parsing the entire GPIO integer space, which is painfully slow. Using a list makes many chip operations that involve lookup or parsing faster, and also simplifies the code. It is also necessary to eventually get rid of the global gpio_desc[] array. The list of gpio_chips is always ordered by base GPIO number to ensure chips traversal is done in the right order. Signed-off-by: Alexandre Courbot Reviewed-by: Linus Walleij --- drivers/gpio/gpiolib.c | 51 +++++++++++++++++++++++++++++++++++++++------- include/asm-generic/gpio.h | 2 ++ 2 files changed, 46 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index e27877a..0050766 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -71,6 +72,8 @@ struct gpio_desc { }; static struct gpio_desc gpio_desc[ARCH_NR_GPIOS]; +static LIST_HEAD(gpio_chips); + #ifdef CONFIG_GPIO_SYSFS static DEFINE_IDR(dirent_idr); #endif @@ -1013,6 +1016,43 @@ static inline void gpiochip_unexport(struct gpio_chip *chip) #endif /* CONFIG_GPIO_SYSFS */ +/* + * Add a new chip to the global chips list, keeping the list of chips sorted + * by base order. + * + * Return -EBUSY if the new chip overlaps with some other chip's integer + * space. + */ +static int gpiochip_add_to_list(struct gpio_chip *chip) +{ + struct list_head *pos = &gpio_chips; + struct gpio_chip *_chip; + int err = 0; + + /* find where to insert our chip */ + list_for_each(pos, &gpio_chips) { + _chip = list_entry(pos, struct gpio_chip, list); + /* shall we insert before _chip? */ + if (_chip->base >= chip->base + chip->ngpio) + break; + } + + /* are we stepping on the chip right before? */ + if (pos != &gpio_chips && pos->prev != &gpio_chips) { + _chip = list_entry(pos->prev, struct gpio_chip, list); + if (_chip->base + _chip->ngpio > chip->base) { + dev_err(chip->dev, + "GPIO integer space overlap, cannot add chip\n"); + err = -EBUSY; + } + } + + if (!err) + list_add_tail(&chip->list, pos); + + return err; +} + /** * gpiochip_add() - register a gpio_chip * @chip: the chip to register, with chip->base initialized @@ -1054,13 +1094,8 @@ int gpiochip_add(struct gpio_chip *chip) chip->base = base; } - /* these GPIO numbers must not be managed by another gpio_chip */ - for (id = base; id < base + chip->ngpio; id++) { - if (gpio_desc[id].chip != NULL) { - status = -EBUSY; - break; - } - } + status = gpiochip_add_to_list(chip); + if (status == 0) { for (id = base; id < base + chip->ngpio; id++) { gpio_desc[id].chip = chip; @@ -1134,6 +1169,8 @@ int gpiochip_remove(struct gpio_chip *chip) if (status == 0) { for (id = chip->base; id < chip->base + chip->ngpio; id++) gpio_desc[id].chip = NULL; + + list_del(&chip->list); } spin_unlock_irqrestore(&gpio_lock, flags); diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index 2034e69..b562f95 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -53,6 +53,7 @@ struct device_node; * @label: for diagnostics * @dev: optional device providing the GPIOs * @owner: helps prevent removal of modules exporting active GPIOs + * @list: links gpio_chips together for traversal * @request: optional hook for chip-specific activation, such as * enabling module power and clock; may sleep * @free: optional hook for chip-specific deactivation, such as @@ -98,6 +99,7 @@ struct gpio_chip { const char *label; struct device *dev; struct module *owner; + struct list_head list; int (*request)(struct gpio_chip *chip, unsigned offset);