From patchwork Sat Feb 2 17:25:44 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 2084471 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 091C0DFB79 for ; Sat, 2 Feb 2013 17:28:57 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U1grM-00011T-8G; Sat, 02 Feb 2013 17:26:36 +0000 Received: from mail-pb0-f52.google.com ([209.85.160.52]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U1grD-0000ym-7G for linux-arm-kernel@lists.infradead.org; Sat, 02 Feb 2013 17:26:28 +0000 Received: by mail-pb0-f52.google.com with SMTP id mc8so1838695pbc.39 for ; Sat, 02 Feb 2013 09:26:26 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=+HtHaZmkCvs69V7R1HdqrTax41tda6XG8bok4OmmUkU=; b=P8FNQlRbWAsKeUbbAiggBUUXpsW4/imSGWLwpmDJMXuXfAl6INSaGDxM1SDRcIFlAF SbHlDjBaagu6MULLO5xG37GpyiX2SsZCzQ47k2veR/mwmDz5Mz4eaL0MUZegj5ydtwRz Rxm3oQxKJ1029o22S7PE4ztDGn6/weeVyH0IavXu4ctsQOgJlaeYXcgLV7j1DUWRKFVK u4K2jJLvkke8Dls4WQqFj6CFZI5ykwEZKP7HlT4UMDLaFCoDqd4UuGCuTN8hmlF54Afx 0nFFsU0NnL/iE0eA05ZQp0Lp9Gpx7IPveCdg0qGrgnkEwu8f776MqQAfGukfzhufv5ts pGNg== X-Received: by 10.66.83.165 with SMTP id r5mr39523950pay.3.1359825985944; Sat, 02 Feb 2013 09:26:25 -0800 (PST) Received: from localhost.localdomain ([27.115.121.35]) by mx.google.com with ESMTPS id b3sm10434040pax.14.2013.02.02.09.26.20 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 02 Feb 2013 09:26:25 -0800 (PST) From: Haojian Zhuang To: shiraz.hashim@st.com, shiraz.linux.kernel@gmail.com, linux@arm.linux.org.uk, tony@atomide.com, linux-arm-kernel@lists.infradead.org, swarren@nvidia.com Subject: [PATCH v8 03/12] gpio: find gpio base by ascend order Date: Sun, 3 Feb 2013 01:25:44 +0800 Message-Id: <1359825953-15663-4-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1359825953-15663-1-git-send-email-haojian.zhuang@linaro.org> References: <1359825953-15663-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQk2Zh9ttLSXoMC6qtKom+GGb2W34Z9wW1r4g/FobCeOmQmaVDOJNt43nAk1BScS+/PIVsd+ X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130202_122627_366482_FA630EF1 X-CRM114-Status: GOOD ( 10.30 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.52 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Haojian Zhuang , patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org gpiochip_find_base() always tries to find valid gpio with descend order. It's inconvient if gpio information is passing from DTS. Now try to find valid gpio with ascend order. Signed-off-by: Haojian Zhuang --- drivers/gpio/gpiolib.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 199fca1..8af57e7 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -128,20 +128,21 @@ static int gpiochip_find_base(int ngpio) int spare = 0; int base = -ENOSPC; - for (i = ARCH_NR_GPIOS - 1; i >= 0 ; i--) { + for (i = 0, base = 0; i < ARCH_NR_GPIOS; i++) { struct gpio_desc *desc = &gpio_desc[i]; struct gpio_chip *chip = desc->chip; - if (!chip && !test_bit(FLAG_RESERVED, &desc->flags)) { + if (chip) { + spare = 0; + i += chip->ngpio - 1; + base = i + 1; + } else if (test_bit(FLAG_RESERVED, &desc->flags)) { + spare = 0; + base = i + 1; + } else { spare++; - if (spare == ngpio) { - base = i; + if (spare == ngpio) break; - } - } else { - spare = 0; - if (chip) - i -= chip->ngpio - 1; } }