From patchwork Tue Feb 12 05:32:11 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chander Kashyap X-Patchwork-Id: 2127421 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id B5074DFB7B for ; Tue, 12 Feb 2013 05:35:31 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U58Tx-00060K-MY; Tue, 12 Feb 2013 05:32:41 +0000 Received: from mail-ee0-f44.google.com ([74.125.83.44]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U58Tu-0005zy-5h for linux-arm-kernel@lists.infradead.org; Tue, 12 Feb 2013 05:32:38 +0000 Received: by mail-ee0-f44.google.com with SMTP id l10so3685805eei.17 for ; Mon, 11 Feb 2013 21:32:35 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer :x-gm-message-state; bh=qhuDMNg514p9iKC0hHaBAr1IUGNJ/EdGzR4N2KtMfsE=; b=MxOOs6Hk21IwUFeUCisia18FSH2QnnjaP35lqRxP8QYU53c8srO6ES1SWG67t1suMQ ERCGNNi1P0y+BHy8XchnDokavMz3KgAoJ9FI/wawpum3AI8lKcQOjEoRjC0jcL0jfUNq wSR5CoC6choQkMTJHJc7ksjOZ4TCjXB9KESXj39tNo3FmvjDyj2fIyopZMIgGUw7qlre BnREdTdymML7X9WJ5OefyMq359y3Ae5+oTyOa9hbzOWsyvXt8ImH9tJDQrJ/scpOnPh+ WfP1Z6EWXosOoUV9gZQldd0IwCaIhudY2nxA5W7seKhgWRJGyB5RKVfIkJpSusPXUOiI ZlpA== X-Received: by 10.14.219.5 with SMTP id l5mr59335214eep.7.1360647154957; Mon, 11 Feb 2013 21:32:34 -0800 (PST) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id j46sm62562032eeo.3.2013.02.11.21.32.28 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 11 Feb 2013 21:32:34 -0800 (PST) From: Chander Kashyap To: linux-samsung-soc@vger.kernel.org Subject: [PATCH] ARM: EXYNOS: update secondary startup code to use 24 bits of MPIDR Date: Tue, 12 Feb 2013 11:02:11 +0530 Message-Id: <1360647131-18461-1-git-send-email-chander.kashyap@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQnzvqb+5sUBHQpKPC8MUg1ClRWNyMUDtSCoUPQ6vBZb18X36D6/h2+VWkKcyFMYyuAeTkY0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130212_003238_338543_6EECC94F X-CRM114-Status: GOOD ( 10.34 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.83.44 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: lorenzo.pieralisi@arm.com, linaro-dev@lists.linaro.org, patches@linaro.org, Chander Kashyap , kgene.kim@samsung.com, Inderpal Singh , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Commit a0ae0240507... "ARM: kernel: add device tree init map function" started using 24 LSBs of MPIDR to calculate the cpu_logical_map. Hence update the same in exynos_secondary_startup code. Signed-off-by: Chander Kashyap Signed-off-by: Inderpal Singh --- arch/arm/mach-exynos/headsmp.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S index 5364d4b..5c1c24a 100644 --- a/arch/arm/mach-exynos/headsmp.S +++ b/arch/arm/mach-exynos/headsmp.S @@ -22,7 +22,7 @@ */ ENTRY(exynos4_secondary_startup) mrc p15, 0, r0, c0, c0, 5 - and r0, r0, #15 + and r0, r0, #0xffffff adr r4, 1f ldmia r4, {r5, r6} sub r4, r4, r5