From patchwork Wed Feb 13 10:55:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 2135241 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 4F254DFE75 for ; Wed, 13 Feb 2013 10:58:40 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U5a0C-0005gA-0B; Wed, 13 Feb 2013 10:55:48 +0000 Received: from ducie-dc1.codethink.co.uk ([37.128.190.40]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U5Zzw-0005cg-An for linux-arm-kernel@lists.infradead.org; Wed, 13 Feb 2013 10:55:33 +0000 Received: by ducie-dc1.codethink.co.uk (Postfix, from userid 1002) id 896C046C1B3; Wed, 13 Feb 2013 10:55:30 +0000 (GMT) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on ducie-dc1.codethink.co.uk X-Spam-Level: X-Spam-Status: No, score=-2.9 required=6.0 tests=ALL_TRUSTED,BAYES_00 autolearn=unavailable version=3.3.2 Received: from rainbowdash.ducie.codethink.co.uk (rainbowdash.dyn.ducie.codethink.co.uk [192.168.24.216]) by ducie-dc1.codethink.co.uk (Postfix) with ESMTPS id 8185F46C1A0; Wed, 13 Feb 2013 10:55:28 +0000 (GMT) Received: from ben by rainbowdash.ducie.codethink.co.uk with local (Exim 4.80) (envelope-from ) id 1U5Zzt-0007dp-N6; Wed, 13 Feb 2013 10:55:29 +0000 From: Ben Dooks To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/9] ARM: fixup_pv_table bug when CPU_ENDIAN_BE8 Date: Wed, 13 Feb 2013 10:55:20 +0000 Message-Id: <1360752927-29331-3-git-send-email-ben.dooks@codethink.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1360752927-29331-1-git-send-email-ben.dooks@codethink.co.uk> References: <1360752927-29331-1-git-send-email-ben.dooks@codethink.co.uk> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130213_055532_491713_1E5708AF X-CRM114-Status: GOOD ( 12.12 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Ben Dooks , will.deacon@arm.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The fixup_pv_table assumes that the instructions are in the same endian configuration as the data, but when the CPU is running in BE8 the instructions stay in little-endian format. Make sure if CONFIG_CPU_ENDIAN_BE8 is set that we do all the alterations to the instructions taking in to account the LDR/STR will be swapping the data endian-ness. Since the code is only modifying a byte, we avoid dual-swapping the data, and just change the bits we clear and ORR in. Note, not tested against an actual bug, it looked wrong. Signed-off-by: Ben Dooks --- arch/arm/kernel/head.S | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 486a15a..cc15384 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -576,8 +576,14 @@ __fixup_a_pv_table: #else b 2f 1: ldr ip, [r7, r3] +#ifdef CONFIG_CPU_ENDIAN_BE8 + @ in BE8, we load data in BE, but instructions still in LE + bic ip, ip, #0xff000000 + orr ip, ip, r6, lsl#24 +#else bic ip, ip, #0x000000ff orr ip, ip, r6 @ mask in offset bits 31-24 +#endif str ip, [r7, r3] 2: cmp r4, r5 ldrcc r7, [r4], #4 @ use branch for delay slot