From patchwork Wed Feb 13 17:34:30 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philipp Zabel X-Patchwork-Id: 2137951 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id A91EADFE75 for ; Wed, 13 Feb 2013 17:37:39 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U5gEc-0002Cw-N2; Wed, 13 Feb 2013 17:35:07 +0000 Received: from metis.ext.pengutronix.de ([2001:6f8:1178:4:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U5gED-000219-RK for linux-arm-kernel@lists.infradead.org; Wed, 13 Feb 2013 17:34:42 +0000 Received: from dude.hi.pengutronix.de ([10.1.0.7] helo=dude.pengutronix.de) by metis.ext.pengutronix.de with esmtp (Exim 4.72) (envelope-from ) id 1U5gEA-0003FX-Gy; Wed, 13 Feb 2013 18:34:38 +0100 From: Philipp Zabel To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 6/8] ARM i.MX5: Add System Reset Controller (SRC) support for i.MX51 and i.MX53 Date: Wed, 13 Feb 2013 18:34:30 +0100 Message-Id: <1360776872-18584-7-git-send-email-p.zabel@pengutronix.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1360776872-18584-1-git-send-email-p.zabel@pengutronix.de> References: <1360776872-18584-1-git-send-email-p.zabel@pengutronix.de> X-SA-Exim-Connect-IP: 10.1.0.7 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130213_123442_043412_849EBCDC X-CRM114-Status: GOOD ( 14.15 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Marek Vasut , Fabio Estevam , Mike Turquette , Philipp Zabel , Stephen Warren , Sascha Hauer , kernel@pengutronix.de, Shawn Guo , devicetree-discuss@lists.ozlabs.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The SRC in i.MX51 and i.MX53 is similar to the one in i.MX6q minus the IPU2 reset line and multi core CPU reset/enable bits. Signed-off-by: Philipp Zabel Reviewed-by: Stephen Warren --- Changes since v1: - Changed matching compatible string to "fsl,imx51-src" - Use imx_src_init for both i.MX5 and i.MX6 --- arch/arm/boot/dts/imx6q.dtsi | 2 +- arch/arm/mach-imx/Kconfig | 2 ++ arch/arm/mach-imx/mm-imx5.c | 2 ++ arch/arm/mach-imx/src.c | 4 +++- 4 files changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 03ad5d5..c444336 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -552,7 +552,7 @@ }; src: src@020d8000 { - compatible = "fsl,imx6q-src"; + compatible = "fsl,imx6q-src", "fsl,imx51-src"; reg = <0x020d8000 0x4000>; interrupts = <0 91 0x04 0 96 0x04>; #reset-cells = <1>; diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 7b11d33..82c7f07 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -165,6 +165,7 @@ config SOC_IMX51 bool select ARCH_MX5 select ARCH_MX51 + select HAVE_IMX_SRC select PINCTRL select PINCTRL_IMX51 select SOC_IMX5 @@ -792,6 +793,7 @@ config SOC_IMX53 select ARCH_MX5 select ARCH_MX53 select HAVE_CAN_FLEXCAN if CAN + select HAVE_IMX_SRC select IMX_HAVE_PLATFORM_IMX2_WDT select PINCTRL select PINCTRL_IMX53 diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index cf34994..b7c4e70 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c @@ -84,6 +84,7 @@ void __init imx51_init_early(void) mxc_set_cpu_type(MXC_CPU_MX51); mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); + imx_src_init(); } void __init imx53_init_early(void) @@ -91,6 +92,7 @@ void __init imx53_init_early(void) mxc_set_cpu_type(MXC_CPU_MX53); mxc_iomux_v3_init(MX53_IO_ADDRESS(MX53_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR)); + imx_src_init(); } void __init mx51_init_irq(void) diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c index 3228484..7ca37bb 100644 --- a/arch/arm/mach-imx/src.c +++ b/arch/arm/mach-imx/src.c @@ -112,7 +112,9 @@ void __init imx_src_init(void) struct device_node *np; u32 val; - np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-src"); + np = of_find_compatible_node(NULL, NULL, "fsl,imx51-src"); + if (!np) + return; src_base = of_iomap(np, 0); WARN_ON(!src_base);