From patchwork Mon Feb 18 08:13:40 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Abraham X-Patchwork-Id: 2156171 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id E38113FCFC for ; Mon, 18 Feb 2013 08:17:21 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U7Ls9-0000zp-4Q; Mon, 18 Feb 2013 08:14:49 +0000 Received: from mail-da0-f43.google.com ([209.85.210.43]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U7Lrj-0000tn-VC for linux-arm-kernel@lists.infradead.org; Mon, 18 Feb 2013 08:14:25 +0000 Received: by mail-da0-f43.google.com with SMTP id u36so2374589dak.30 for ; Mon, 18 Feb 2013 00:14:22 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=nY88M7N1YdnVADBFQJ/GhdO/KjHfjod7INBdRI8iP+I=; b=fXcx57D/5RJfzfwuJMMh+fDNldPhMRD1Jb7uToEFg1ReKYmk4dP3v9I5W4OxFLP+a2 rsnrK58Zi9a2B14wP9mfOYpmUFGBINazNl/nQsGrVcIiHZzHoX2TqKs5iTI3quwhsoIx 07lIQVgbPhbpL/C3lY0DkcWVJVdAgHaOzRTdlYrxlCFPFRnDxAQcTsdZrILENzyPxAHD jKkozQB0e0wn4Pd8Ref4jNqdP/6U2wfseHDU89k1Y76slqsR4cLhOfdisL1sdEW4yLfH T0r3+msa/nDJY5ND2uXaQ0c4rVrJ0yOMKy3iunh6LOX6uwCd1Jbw09nh55SSsvyGCliR KQpg== X-Received: by 10.68.204.234 with SMTP id lb10mr27486062pbc.64.1361175262497; Mon, 18 Feb 2013 00:14:22 -0800 (PST) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id 1sm2182920pba.32.2013.02.18.00.14.19 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 18 Feb 2013 00:14:21 -0800 (PST) From: Thomas Abraham To: devicetree-discuss@lists.ozlabs.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 2/7] ARM: Exynos: prepare an array of MCT interrupt numbers and use it Date: Mon, 18 Feb 2013 13:43:40 +0530 Message-Id: <1361175225-19282-3-git-send-email-thomas.abraham@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1361175225-19282-1-git-send-email-thomas.abraham@linaro.org> References: <1361175225-19282-1-git-send-email-thomas.abraham@linaro.org> X-Gm-Message-State: ALoCoQkWimPFfaatabhDwPhBBrdjvB7CoEtr3KMApcfHn3IjNdeaerEFsyueBwi6Uv95kcNL9Bwd X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130218_031424_130434_529AB714 X-CRM114-Status: GOOD ( 16.43 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.43 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: kgene.kim@samsung.com, swarren@nvidia.com, t.figa@samsung.com, sylvester.nawrocki@gmail.com, chaos.youn@samsung.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Instead of using soc_is_xxx macro at more than one place in the MCT controller driver to decide the MCT interrpt number to be setup, populate a table of known MCT global and local timer interrupts and use the values in table to setup the MCT interrupts. This also helps in adding device tree support for MCT controller driver by allowing the driver to retrieve interrupt numbers from device tree and populating them into this table, thereby supporting both legacy and dt functionality to co-exist. Cc: Changhwan Youn Signed-off-by: Thomas Abraham --- arch/arm/mach-exynos/mct.c | 57 +++++++++++++++++++++++++++---------------- 1 files changed, 36 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c index e3d67ec..aa0ae65 100644 --- a/arch/arm/mach-exynos/mct.c +++ b/arch/arm/mach-exynos/mct.c @@ -66,9 +66,22 @@ enum { MCT_INT_PPI }; +enum { + MCT_G0_IRQ, + MCT_G1_IRQ, + MCT_G2_IRQ, + MCT_G3_IRQ, + MCT_L0_IRQ, + MCT_L1_IRQ, + MCT_L2_IRQ, + MCT_L3_IRQ, + MCT_NR_IRQS, +}; + static void __iomem *reg_base; static unsigned long clk_rate; static unsigned int mct_int_type; +static int mct_irqs[MCT_NR_IRQS]; struct mct_clock_event_device { struct clock_event_device *evt; @@ -283,11 +296,7 @@ static void exynos4_clockevent_init(void) mct_comp_device.cpumask = cpumask_of(0); clockevents_config_and_register(&mct_comp_device, clk_rate, 0xf, 0xffffffff); - - if (soc_is_exynos5250()) - setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq); - else - setup_irq(EXYNOS4_IRQ_MCT_G0, &mct_comp_event_irq); + setup_irq(mct_irqs[MCT_G0_IRQ], &mct_comp_event_irq); } #ifdef CONFIG_LOCAL_TIMERS @@ -411,7 +420,6 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt) { struct mct_clock_event_device *mevt; unsigned int cpu = smp_processor_id(); - int mct_lx_irq; mevt = this_cpu_ptr(&percpu_mct_tick); mevt->evt = evt; @@ -432,21 +440,17 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt) if (mct_int_type == MCT_INT_SPI) { if (cpu == 0) { - mct_lx_irq = soc_is_exynos4210() ? EXYNOS4_IRQ_MCT_L0 : - EXYNOS5_IRQ_MCT_L0; mct_tick0_event_irq.dev_id = mevt; - evt->irq = mct_lx_irq; - setup_irq(mct_lx_irq, &mct_tick0_event_irq); + evt->irq = mct_irqs[MCT_L0_IRQ]; + setup_irq(evt->irq, &mct_tick0_event_irq); } else { - mct_lx_irq = soc_is_exynos4210() ? EXYNOS4_IRQ_MCT_L1 : - EXYNOS5_IRQ_MCT_L1; mct_tick1_event_irq.dev_id = mevt; - evt->irq = mct_lx_irq; - setup_irq(mct_lx_irq, &mct_tick1_event_irq); - irq_set_affinity(mct_lx_irq, cpumask_of(1)); + evt->irq = mct_irqs[MCT_L1_IRQ]; + setup_irq(evt->irq, &mct_tick1_event_irq); + irq_set_affinity(evt->irq, cpumask_of(1)); } } else { - enable_percpu_irq(EXYNOS_IRQ_MCT_LOCALTIMER, 0); + enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0); } return 0; @@ -462,7 +466,7 @@ static void exynos4_local_timer_stop(struct clock_event_device *evt) else remove_irq(evt->irq, &mct_tick1_event_irq); else - disable_percpu_irq(EXYNOS_IRQ_MCT_LOCALTIMER); + disable_percpu_irq(mct_irqs[MCT_L0_IRQ]); } static struct local_timer_ops exynos4_mct_tick_ops __cpuinitdata = { @@ -484,11 +488,11 @@ static void __init exynos4_timer_resources(void) if (mct_int_type == MCT_INT_PPI) { int err; - err = request_percpu_irq(EXYNOS_IRQ_MCT_LOCALTIMER, + err = request_percpu_irq(mct_irqs[MCT_L0_IRQ], exynos4_mct_tick_isr, "MCT", &percpu_mct_tick); WARN(err, "MCT: can't request IRQ %d (%d)\n", - EXYNOS_IRQ_MCT_LOCALTIMER, err); + mct_irqs[MCT_L0_IRQ], err); } local_timer_register(&exynos4_mct_tick_ops); @@ -502,10 +506,21 @@ void __init exynos4_timer_init(void) return; } - if ((soc_is_exynos4210()) || (soc_is_exynos5250())) + if (soc_is_exynos4210()) { + mct_irqs[MCT_G0_IRQ] = EXYNOS4_IRQ_MCT_G0; + mct_irqs[MCT_L0_IRQ] = EXYNOS4_IRQ_MCT_L0; + mct_irqs[MCT_L1_IRQ] = EXYNOS4_IRQ_MCT_L1; mct_int_type = MCT_INT_SPI; - else + } else if (soc_is_exynos5250()) { + mct_irqs[MCT_G0_IRQ] = EXYNOS5_IRQ_MCT_G0; + mct_irqs[MCT_L0_IRQ] = EXYNOS5_IRQ_MCT_L0; + mct_irqs[MCT_L1_IRQ] = EXYNOS5_IRQ_MCT_L1; + mct_int_type = MCT_INT_SPI; + } else { + mct_irqs[MCT_G0_IRQ] = EXYNOS4_IRQ_MCT_G0; + mct_irqs[MCT_L0_IRQ] = EXYNOS_IRQ_MCT_LOCALTIMER; mct_int_type = MCT_INT_PPI; + } exynos4_timer_resources(); exynos4_clocksource_init();