From patchwork Mon Feb 18 08:21:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Abraham X-Patchwork-Id: 2156511 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 4D19CDF25A for ; Mon, 18 Feb 2013 08:28:54 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U7M39-0007tO-QT; Mon, 18 Feb 2013 08:26:11 +0000 Received: from mail-pb0-f44.google.com ([209.85.160.44]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U7Lzg-0005T7-Ax for linux-arm-kernel@lists.infradead.org; Mon, 18 Feb 2013 08:22:38 +0000 Received: by mail-pb0-f44.google.com with SMTP id wz12so1547824pbc.3 for ; Mon, 18 Feb 2013 00:22:35 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=5liKBrinqxd2rShghz8JZk9UfJb6BxHfsWCsbJRnct8=; b=g1Cke67Mh12XCTTPQHU9y6xzEec6KAVJeU7nMU1glLc0Yn/N3xzSJWaq7KcDSFnUlp R/rjZS8BJpHl1hBNlJCgC53vp1K1ChZjnqJYZpVR2KpYmTkbYZONPC7YpQxORk4Rknzl 48Ejiu4yximqwzDVELyMaIh7QTuy0dVAaHW+pQ5YnGSUrolFWCGxgBtVrSY6tJdrfiQo mNQ/OVeV1nQOyadiolzJcXbsI41Z+lOuQBVo1V+IYQsp/NypcX3AjxB0R6TIdoCOrw38 9q/WBtOR+ZG+ZdfkisBmtlOJEQPAkSmlx+Tc7xUqKB4rPXmvD4GflLBRypoLoXVXa0GZ 028w== X-Received: by 10.68.226.67 with SMTP id rq3mr27347951pbc.137.1361175755226; Mon, 18 Feb 2013 00:22:35 -0800 (PST) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id hp7sm13733707pbc.8.2013.02.18.00.22.32 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 18 Feb 2013 00:22:34 -0800 (PST) From: Thomas Abraham To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v6 12/16] ARM: dts: add Exynos4 and Exynos5 clock controller nodes Date: Mon, 18 Feb 2013 13:51:22 +0530 Message-Id: <1361175686-19400-13-git-send-email-thomas.abraham@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1361175686-19400-1-git-send-email-thomas.abraham@linaro.org> References: <1361175686-19400-1-git-send-email-thomas.abraham@linaro.org> X-Gm-Message-State: ALoCoQm7cy02apPjNblbbnQVVWmUT0KS2HsgwEYCCYGqjo5KDcbyRkUkJacvt0LvoIRyZCX+Ck3Y X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130218_032236_501685_D519CA76 X-CRM114-Status: UNSURE ( 9.36 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.44 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: devicetree-discuss@lists.ozlabs.org, kgene.kim@samsung.com, mturquette@linaro.org, t.figa@samsung.com, sylvester.nawrocki@gmail.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add clock controller nodes for Exynos4210, Exynos4x12, Exynos5250 and Exynos5440 SoC. Cc: Kukjin Kim Signed-off-by: Thomas Abraham --- arch/arm/boot/dts/exynos4210.dtsi | 6 ++++++ arch/arm/boot/dts/exynos4x12.dtsi | 6 ++++++ arch/arm/boot/dts/exynos5250.dtsi | 6 ++++++ arch/arm/boot/dts/exynos5440.dtsi | 6 ++++++ 4 files changed, 24 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 0e16a34..6b25095 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -69,6 +69,12 @@ }; }; + clock: clock-controller@0x10030000 { + compatible = "samsung,exynos4210-clock"; + reg = <0x10030000 0x20000>; + #clock-cells = <1>; + }; + pmu { compatible = "arm,cortex-a9-pmu"; interrupt-parent = <&combiner>; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 022a839..75be8f5 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -36,6 +36,12 @@ <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>; }; + clock: clock-controller@0x10030000 { + compatible = "samsung,exynos4412-clock"; + reg = <0x10030000 0x20000>; + #clock-cells = <1>; + }; + pinctrl_0: pinctrl@11400000 { compatible = "samsung,exynos4x12-pinctrl"; reg = <0x11400000 0x1000>; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 2bb558e..d3eae4e 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -60,6 +60,12 @@ compatible = "samsung,exynos4210-pd"; reg = <0x10044040 0x20>; }; + + clock: clock-controller@0x10010000 { + compatible = "samsung,exynos5250-clock"; + reg = <0x10010000 0x30000>; + #clock-cells = <1>; + }; gic:interrupt-controller@10481000 { compatible = "arm,cortex-a9-gic"; diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 5c5a699..f5834d0 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -16,6 +16,12 @@ interrupt-parent = <&gic>; + clock: clock-controller@0x160000 { + compatible = "samsung,exynos5440-clock"; + reg = <0x160000 0x1000>; + #clock-cells = <1>; + }; + gic:interrupt-controller@2E0000 { compatible = "arm,cortex-a15-gic"; #interrupt-cells = <3>;