From patchwork Tue Feb 19 16:22:25 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 2163621 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 550853FDF1 for ; Tue, 19 Feb 2013 16:28:04 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U7q0Z-0005QQ-Ay; Tue, 19 Feb 2013 16:25:31 +0000 Received: from mail-pa0-f54.google.com ([209.85.220.54]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U7pyX-0004Df-TQ for linux-arm-kernel@lists.infradead.org; Tue, 19 Feb 2013 16:23:28 +0000 Received: by mail-pa0-f54.google.com with SMTP id fa10so3484959pad.27 for ; Tue, 19 Feb 2013 08:23:25 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=Y4EYfq7cPxLWvOZH6jIi7IWE1VKWgff7VZovhAMJN+0=; b=YOr2Ez7qUFKwrjvwJAnJuofaoUuX6zyZnNC1PaC/0+WupY+DkvPKSLuER0r/QigWCV GZO7D0WSQlk9NOr4TwRULzTNmeJJ0Q7FBcNkReD1e1gs41zcDu3rjpOArtd6CSRdRzxn x7gFWTH+9jT8VlInHsvV84KzciPx4YBgD56KR7VlN9QFxZsgQdV49f/AmhFfOQnjm9fZ 3n0vXjmcPHSQkB5RFh9Kq4y2ayRa9kJGoc5o57zJjTppun8htZd7J2mk5RLnF6jWwVor PAhr0KS8XQKd7MrWA2i0N0Nc5jK8l7DrfcayRzhzVPJeaCuTX3SioA/mBn+fMznHw9Dm 6FOA== X-Received: by 10.68.216.226 with SMTP id ot2mr41511273pbc.99.1361291004918; Tue, 19 Feb 2013 08:23:24 -0800 (PST) Received: from localhost.localdomain ([27.115.121.39]) by mx.google.com with ESMTPS id rn14sm18472714pbb.33.2013.02.19.08.23.19 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 19 Feb 2013 08:23:24 -0800 (PST) From: Haojian Zhuang To: grinberg@compulab.co.il, linus.walleij@linaro.org, linux@arm.linux.org.uk, marek.vasut@gmail.com, robert.jarzmik@free.fr, daniel@caiaq.de, linux-arm-kernel@lists.infradead.org, grant.likely@secretlab.ca, cxie4@marvell.com Subject: [PATCH v4 08/11] gpio: pxa: remove arch related macro Date: Wed, 20 Feb 2013 00:22:25 +0800 Message-Id: <1361290948-16669-9-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1361290948-16669-1-git-send-email-haojian.zhuang@linaro.org> References: <1361290948-16669-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQkOXy/crje9/tj8VopICFq/NGGyBNz75QQsSuVfSFzJSuEbOy6hZo+L2lJcuuLBiSE1dTvm X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130219_112326_113825_C8899F10 X-CRM114-Status: GOOD ( 10.35 ) X-Spam-Score: 0.4 (/) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (0.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.54 listed in list.dnswl.org] 3.0 KHOP_BIG_TO_CC Sent to 10+ recipients instaed of Bcc or a list -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Haojian Zhuang , patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Remove macro CONFIG_ARCH_PXA. Signed-off-by: Haojian Zhuang Tested-by: Igor Grinberg --- drivers/gpio/gpio-pxa.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c index 5879f76..983758f 100644 --- a/drivers/gpio/gpio-pxa.c +++ b/drivers/gpio/gpio-pxa.c @@ -557,21 +557,21 @@ static int pxa_gpio_probe(struct platform_device *pdev) } if (!use_of) { -#ifdef CONFIG_ARCH_PXA - irq = gpio_to_irq(0); - irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, - handle_edge_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - irq_set_chained_handler(IRQ_GPIO0, pxa_gpio_demux_handler); - - irq = gpio_to_irq(1); - irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, - handle_edge_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler); -#endif - - for (irq = gpio_to_irq(gpio_offset); + if (irq0 > 0) { + irq = gpio_to_irq(0); + irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, + handle_edge_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + irq_set_chained_handler(irq0, pxa_gpio_demux_handler); + } + if (irq1 > 0) { + irq = gpio_to_irq(1); + irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, + handle_edge_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + irq_set_chained_handler(irq1, pxa_gpio_demux_handler); + } + for (irq = gpio_to_irq(gpio_offset); irq <= gpio_to_irq(pxa_last_gpio); irq++) { irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, handle_edge_irq);