From patchwork Mon Feb 25 03:49:38 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 2180081 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id A8E01DF230 for ; Mon, 25 Feb 2013 03:57:12 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U9p8d-0004f3-8N; Mon, 25 Feb 2013 03:54:03 +0000 Received: from mail-pa0-f50.google.com ([209.85.220.50]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U9p6L-0003MN-P6 for linux-arm-kernel@lists.infradead.org; Mon, 25 Feb 2013 03:51:42 +0000 Received: by mail-pa0-f50.google.com with SMTP id fa11so1485058pad.9 for ; Sun, 24 Feb 2013 19:51:40 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=wDwb+UWSjN0KhH5gtPAYUYvcrHg2W1v1wrZSw2HN6So=; b=BpdZg+MKeuBQ4IZAP2Nhw6K6cbv7cgIAt4V0oP5M2AG8EKbV8xydGLMtkraUWQ0vrp apihNvoOt8c/S3JTQ7mod4KEYwM8VOAbe/X+0UXa+1bA/u785YEk3HV4Dm7wCdkV90+Q E4HmDeku3L1IpfQGM/JVSiqN/3LEdBqcr2VFT/4A39LGqdBVNzG61Ltk5rf9bJ2M6Bgb wkCvvbQzSOWmJ+tWR2pcTuvZNFXFylAYyi2GANVKzWsqL0+ujEDHGMiwwwa2xlI8Qj8N Bs4CHMc7ysy5ZFp00afr4Ovom/UGjp2pW/VGQy5+gIz447UmIpHC4dfhG/Hz4nksJEqa 7WaA== X-Received: by 10.68.216.99 with SMTP id op3mr15770436pbc.187.1361764300311; Sun, 24 Feb 2013 19:51:40 -0800 (PST) Received: from localhost.localdomain ([67.198.145.34]) by mx.google.com with ESMTPS id b9sm11188695pba.6.2013.02.24.19.51.35 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 24 Feb 2013 19:51:39 -0800 (PST) From: Haojian Zhuang To: grinberg@compulab.co.il, linus.walleij@linaro.org, linux@arm.linux.org.uk, marek.vasut@gmail.com, robert.jarzmik@free.fr, daniel@caiaq.de, linux-arm-kernel@lists.infradead.org, grant.likely@secretlab.ca, cxie4@marvell.com Subject: [PATCH v5 09/12] gpio: pxa: remove arch related macro Date: Mon, 25 Feb 2013 11:49:38 +0800 Message-Id: <1361764181-26647-10-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1361764181-26647-1-git-send-email-haojian.zhuang@linaro.org> References: <1361764181-26647-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQliuqUyy+S5G+C7zp+P//SnC5+LGjTMwB9w6cuO/henVX7fnzGL65fEodyV/wNMNzxFZixh X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130224_225141_946385_A1ADF45F X-CRM114-Status: GOOD ( 10.76 ) X-Spam-Score: 0.4 (/) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (0.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.50 listed in list.dnswl.org] 3.0 KHOP_BIG_TO_CC Sent to 10+ recipients instaed of Bcc or a list -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Haojian Zhuang , patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Remove macro CONFIG_ARCH_PXA. Signed-off-by: Haojian Zhuang Tested-by: Igor Grinberg Acked-by: Linus Walleij --- drivers/gpio/gpio-pxa.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c index 141190c..f5f78ea 100644 --- a/drivers/gpio/gpio-pxa.c +++ b/drivers/gpio/gpio-pxa.c @@ -554,21 +554,21 @@ static int pxa_gpio_probe(struct platform_device *pdev) } if (!use_of) { -#ifdef CONFIG_ARCH_PXA - irq = gpio_to_irq(0); - irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, - handle_edge_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - irq_set_chained_handler(IRQ_GPIO0, pxa_gpio_demux_handler); - - irq = gpio_to_irq(1); - irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, - handle_edge_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler); -#endif - - for (irq = gpio_to_irq(gpio_offset); + if (irq0 > 0) { + irq = gpio_to_irq(0); + irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, + handle_edge_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + irq_set_chained_handler(irq0, pxa_gpio_demux_handler); + } + if (irq1 > 0) { + irq = gpio_to_irq(1); + irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, + handle_edge_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + irq_set_chained_handler(irq1, pxa_gpio_demux_handler); + } + for (irq = gpio_to_irq(gpio_offset); irq <= gpio_to_irq(pxa_last_gpio); irq++) { irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, handle_edge_irq);