From patchwork Mon Feb 25 14:44:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Emilio_L=C3=B3pez?= X-Patchwork-Id: 2181191 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id DF0B03FCA4 for ; Mon, 25 Feb 2013 14:53:22 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U9zOI-0006P1-Ew; Mon, 25 Feb 2013 14:50:54 +0000 Received: from avas-mr18.fibertel.com.ar ([24.232.0.121]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U9zNs-0006H5-FE for linux-arm-kernel@lists.infradead.org; Mon, 25 Feb 2013 14:50:29 +0000 Received: from 201-212-118-238.prima.net.ar ([201.212.118.238]:32941 "EHLO desktop.lan" smtp-auth: "elopez" rhost-flags-OK-OK-OK-FAIL) by avas-mr18.fibertel.com.ar with ESMTPA id S753432Ab3BYOuX; Mon, 25 Feb 2013 11:50:23 -0300 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= To: Gregory CLEMENT , Mike Turquette , Maxime Ripard Subject: [PATCH v2 2/3] arm: sunxi: Add clock definitions for the new clock driver Date: Mon, 25 Feb 2013 11:44:27 -0300 Message-Id: <1361803468-9899-3-git-send-email-emilio@elopez.com.ar> X-Mailer: git-send-email 1.8.2.rc0 In-Reply-To: <1361803468-9899-1-git-send-email-emilio@elopez.com.ar> References: <1358835176-7197-1-git-send-email-emilio@elopez.com.ar> <1361803468-9899-1-git-send-email-emilio@elopez.com.ar> MIME-Version: 1.0 X-Fib-Al-Info: Al X-Fib-Al-MRId: 535caf04116802373136a7a3976a6d2f X-Fib-Al: noav X-Fib-Al-SA: analyzed X-Fib-Al-From: emilio@elopez.com.ar X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130225_095028_892147_37C57C90 X-CRM114-Status: GOOD ( 10.08 ) X-Spam-Score: 3.3 (+++) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (3.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [24.232.0.121 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 2.5 TAB_IN_FROM From starts with a tab 2.8 KB_DATE_CONTAINS_TAB KB_DATE_CONTAINS_TAB Cc: Alejandro Mery , =?UTF-8?q?Emilio=20L=C3=B3pez?= , Ezequiel Garcia , Stefan Roese , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This introduces proper clock definitions on sunxi.dtsi, to be used with the new clock driver for sunxi. Signed-off-by: Emilio López --- arch/arm/boot/dts/sunxi.dtsi | 83 ++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 80 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/sunxi.dtsi b/arch/arm/boot/dts/sunxi.dtsi index 8b36abe..acf7777 100644 --- a/arch/arm/boot/dts/sunxi.dtsi +++ b/arch/arm/boot/dts/sunxi.dtsi @@ -24,13 +24,90 @@ clocks { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; + ranges; - osc: oscillator { + /* + * This is a dummy clock, to be used as placeholder on + * other mux clocks when a specific parent clock is not + * yet implemented. It should be dropped when the driver + * is complete. + */ + dummy: dummy { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; + + osc24M_fixed: osc24M_fixed { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; }; + + osc24M: osc24M@01c20050 { + #clock-cells = <0>; + compatible = "allwinner,sunxi-osc-clk"; + reg = <0x01c20050 0x4>; + clocks = <&osc24M_fixed>; + }; + + osc32k: osc32k { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + }; + + pll1: pll1@01c20000 { + #clock-cells = <0>; + compatible = "allwinner,sunxi-pll1-clk"; + reg = <0x01c20000 0x4>; + clocks = <&osc24M>; + }; + + /* dummy is 200M */ + cpu: cpu@01c20054 { + #clock-cells = <0>; + compatible = "allwinner,sunxi-cpu-clk"; + reg = <0x01c20054 0x4>; + clocks = <&osc32k>, <&osc24M>, <&pll1>, <&dummy>; + }; + + axi: axi@01c20054 { + #clock-cells = <0>; + compatible = "allwinner,sunxi-axi-clk"; + reg = <0x01c20054 0x4>; + clocks = <&cpu>; + }; + + ahb: ahb@01c20054 { + #clock-cells = <0>; + compatible = "allwinner,sunxi-ahb-clk"; + reg = <0x01c20054 0x4>; + clocks = <&axi>; + }; + + apb0: apb0@01c20054 { + #clock-cells = <0>; + compatible = "allwinner,sunxi-apb0-clk"; + reg = <0x01c20054 0x4>; + clocks = <&ahb>; + }; + + /* dummy is pll62 */ + apb1_mux: apb1_mux@01c20058 { + #clock-cells = <0>; + compatible = "allwinner,sunxi-apb1-mux-clk"; + reg = <0x01c20058 0x4>; + clocks = <&osc24M>, <&dummy>, <&osc32k>; + }; + + apb1: apb1@01c20058 { + #clock-cells = <0>; + compatible = "allwinner,sunxi-apb1-clk"; + reg = <0x01c20058 0x4>; + clocks = <&apb1_mux>; + }; }; soc { @@ -44,7 +121,7 @@ compatible = "allwinner,sunxi-timer"; reg = <0x01c20c00 0x90>; interrupts = <22>; - clocks = <&osc>; + clocks = <&osc24M>; }; wdt: watchdog@01c20c90 {