From patchwork Wed Feb 27 02:35:52 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Shijie X-Patchwork-Id: 2191911 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 802223FD4E for ; Wed, 27 Feb 2013 02:39:56 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UAWtE-0003qx-Vu; Wed, 27 Feb 2013 02:37:04 +0000 Received: from ch1ehsobe004.messaging.microsoft.com ([216.32.181.184] helo=ch1outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UAWtB-0003pv-8d for linux-arm-kernel@lists.infradead.org; Wed, 27 Feb 2013 02:37:01 +0000 Received: from mail190-ch1-R.bigfish.com (10.43.68.249) by CH1EHSOBE005.bigfish.com (10.43.70.55) with Microsoft SMTP Server id 14.1.225.23; Wed, 27 Feb 2013 02:36:59 +0000 Received: from mail190-ch1 (localhost [127.0.0.1]) by mail190-ch1-R.bigfish.com (Postfix) with ESMTP id 2AE14380261; Wed, 27 Feb 2013 02:36:59 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 6 X-BigFish: VS6(zcb8kzzz1f42h1ee6h1de0h1202h1e76h1d1ah1d2ah1082kzz8275bhz2dh2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1155h) Received: from mail190-ch1 (localhost.localdomain [127.0.0.1]) by mail190-ch1 (MessageSwitch) id 136193261730726_6912; Wed, 27 Feb 2013 02:36:57 +0000 (UTC) Received: from CH1EHSMHS026.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.245]) by mail190-ch1.bigfish.com (Postfix) with ESMTP id 03D4432006A; Wed, 27 Feb 2013 02:36:57 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS026.bigfish.com (10.43.70.26) with Microsoft SMTP Server (TLS) id 14.1.225.23; Wed, 27 Feb 2013 02:36:54 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server (TLS) id 14.2.328.11; Wed, 27 Feb 2013 02:36:42 +0000 Received: from shlinux2.ap.freescale.net (shlinux2.ap.freescale.net [10.192.224.44]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id r1R2ahfY002681; Tue, 26 Feb 2013 19:36:47 -0700 From: Huang Shijie To: Subject: [PATCH 1/2] pinctrl: imx6q: add DTE pinctrl items for mx6q uart Date: Wed, 27 Feb 2013 10:35:52 +0800 Message-ID: <1361932553-8218-1-git-send-email-b32955@freescale.com> X-Mailer: git-send-email 1.7.1 MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130226_213701_350290_1367A3D3 X-CRM114-Status: GOOD ( 10.25 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [216.32.181.184 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: shawn.guo@linaro.org, linus.walleij@linaro.org, rob.herring@calxeda.com, Huang Shijie , dong.aisheng@linaro.org, devicetree-discuss@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch adds two DTE pinctrl items for UART in mx6q. MX6Q_PAD_EIM_D27__UART2_RXD_DTE: set the RX/TX into DTE mode. MX6Q_PAD_EIM_D29__UART2_RTS_DTE: set the RTS/CTS into DTE mode. If the uart want to work in DTE mode and enable the hardware flow control, it must selects these two pinctrl items. Signed-off-by: Huang Shijie --- .../bindings/pinctrl/fsl,imx6q-pinctrl.txt | 2 ++ drivers/pinctrl/pinctrl-imx6q.c | 2 ++ 2 files changed, 4 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt index a4119f6..91b8fa5 100644 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt @@ -1628,3 +1628,5 @@ MX6Q_PAD_SD2_DAT3__SJC_DONE 1589 MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3 1590 MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID 1591 MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID 1592 +MX6Q_PAD_EIM_D27__UART2_RXD_DTE 1593 +MX6Q_PAD_EIM_D29__UART2_RTS_DTE 1594 diff --git a/drivers/pinctrl/pinctrl-imx6q.c b/drivers/pinctrl/pinctrl-imx6q.c index 663346b..7eaacfb 100644 --- a/drivers/pinctrl/pinctrl-imx6q.c +++ b/drivers/pinctrl/pinctrl-imx6q.c @@ -1952,6 +1952,8 @@ static struct imx_pin_reg imx6q_pin_regs[] = { IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 7, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3 */ IMX_PIN_REG(MX6Q_PAD_ENET_RX_ER, 0x04EC, 0x01D8, 0, 0x0000, 0), /* MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID */ IMX_PIN_REG(MX6Q_PAD_GPIO_1, 0x05F4, 0x0224, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID */ + IMX_PIN_REG(MX6Q_PAD_EIM_D27, 0x03D4, 0x00C0, 4, 0x0928, 0), /* MX6Q_PAD_EIM_D27__UART2_RXD_DTE */ + IMX_PIN_REG(MX6Q_PAD_EIM_D29, 0x03DC, 0x00C8, 4, 0x0924, 0), /* MX6Q_PAD_EIM_D29__UART2_RTS_DTE */ }; /* Pad names for the pinmux subsystem */