| Message ID | 1363257453-24747-3-git-send-email-avinashphilip@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 3/14/2013 4:07 PM, Philip Avinash wrote: > da850 platforms require TBCLK synchronization in CFG_CHIP1 register for > TBCLK enable in EHRPWM modules. Enabling of TBCLK is done only if EHRPWM > DT node status is set to "okay" DT blob. > Also adds macro definitions for DA8XX_EHRPWM_TBCLKSYNC and > DA8XX_CFGCHIP1_REG. So there is actually a TBCLK in DA850 - it's just not modeled as a clock similar to the way it is done on AM335x? If yes, then instead of adding a dummy clock node and doing the TBCLK enable as part of init, why not model TBCLK in clock tree even on DA850? Thanks, Sekhar
On Thu, Mar 14, 2013 at 18:31:52, Nori, Sekhar wrote: > On 3/14/2013 4:07 PM, Philip Avinash wrote: > > da850 platforms require TBCLK synchronization in CFG_CHIP1 register for > > TBCLK enable in EHRPWM modules. Enabling of TBCLK is done only if EHRPWM > > DT node status is set to "okay" DT blob. > > Also adds macro definitions for DA8XX_EHRPWM_TBCLKSYNC and > > DA8XX_CFGCHIP1_REG. > > So there is actually a TBCLK in DA850 - it's just not modeled as a clock > similar to the way it is done on AM335x? If yes, then instead of adding > a dummy clock node and doing the TBCLK enable as part of init, why not > model TBCLK in clock tree even on DA850? TBCLK enabling should done from platform specific way. In DA850 it is done at CFGCHIP1 register. Unfortunately Davinci clock frame work will support only clock nodes inside PLLC and PSC modules. Handling of CFGCHP1 require modifications in clock frame work. Hence handling it as part of initialization. Thanks Avinash > > Thanks, > Sekhar >
On 3/15/2013 10:27 AM, Philip, Avinash wrote: > On Thu, Mar 14, 2013 at 18:31:52, Nori, Sekhar wrote: >> On 3/14/2013 4:07 PM, Philip Avinash wrote: >>> da850 platforms require TBCLK synchronization in CFG_CHIP1 register for >>> TBCLK enable in EHRPWM modules. Enabling of TBCLK is done only if EHRPWM >>> DT node status is set to "okay" DT blob. >>> Also adds macro definitions for DA8XX_EHRPWM_TBCLKSYNC and >>> DA8XX_CFGCHIP1_REG. >> >> So there is actually a TBCLK in DA850 - it's just not modeled as a clock >> similar to the way it is done on AM335x? If yes, then instead of adding >> a dummy clock node and doing the TBCLK enable as part of init, why not >> model TBCLK in clock tree even on DA850? > > > TBCLK enabling should done from platform specific way. In DA850 it is done at > CFGCHIP1 register. Unfortunately Davinci clock frame work will support only > clock nodes inside PLLC and PSC modules. Handling of CFGCHP1 require That's true at the moment, but that can be fixed. > modifications in clock frame work. > > Hence handling it as part of initialization. I am curious as to how this clock is handled in am335x. I searched for tbclk in arch/arm/ of linux-next but could not find any references. Where should I be looking? Thanks, Sekhar
On Fri, Mar 15, 2013 at 10:38:58, Nori, Sekhar wrote: > On 3/15/2013 10:27 AM, Philip, Avinash wrote: > > On Thu, Mar 14, 2013 at 18:31:52, Nori, Sekhar wrote: > >> On 3/14/2013 4:07 PM, Philip Avinash wrote: > >>> da850 platforms require TBCLK synchronization in CFG_CHIP1 register for > >>> TBCLK enable in EHRPWM modules. Enabling of TBCLK is done only if EHRPWM > >>> DT node status is set to "okay" DT blob. > >>> Also adds macro definitions for DA8XX_EHRPWM_TBCLKSYNC and > >>> DA8XX_CFGCHIP1_REG. > >> > >> So there is actually a TBCLK in DA850 - it's just not modeled as a clock > >> similar to the way it is done on AM335x? If yes, then instead of adding > >> a dummy clock node and doing the TBCLK enable as part of init, why not > >> model TBCLK in clock tree even on DA850? > > > > > > TBCLK enabling should done from platform specific way. In DA850 it is done at > > CFGCHIP1 register. Unfortunately Davinci clock frame work will support only > > clock nodes inside PLLC and PSC modules. Handling of CFGCHP1 require > > That's true at the moment, but that can be fixed. I will check. > > > modifications in clock frame work. > > > > Hence handling it as part of initialization. > > I am curious as to how this clock is handled in am335x. I searched for > tbclk in arch/arm/ of linux-next but could not find any references. > Where should I be looking? Patch is submitted. This patch is not in Paul's tree. [PATCH v2] ARM: AM33XX: clk: Add clock node for EHRPWM TBCLK https://patchwork.kernel.org/patch/2127581/ Paul, Can you accept the above patch. Thanks Avinash > > Thanks, > Sekhar >
On 3/15/2013 10:51 AM, Philip, Avinash wrote: > On Fri, Mar 15, 2013 at 10:38:58, Nori, Sekhar wrote: >> On 3/15/2013 10:27 AM, Philip, Avinash wrote: >>> On Thu, Mar 14, 2013 at 18:31:52, Nori, Sekhar wrote: >>>> On 3/14/2013 4:07 PM, Philip Avinash wrote: >>>>> da850 platforms require TBCLK synchronization in CFG_CHIP1 register for >>>>> TBCLK enable in EHRPWM modules. Enabling of TBCLK is done only if EHRPWM >>>>> DT node status is set to "okay" DT blob. >>>>> Also adds macro definitions for DA8XX_EHRPWM_TBCLKSYNC and >>>>> DA8XX_CFGCHIP1_REG. >>>> >>>> So there is actually a TBCLK in DA850 - it's just not modeled as a clock >>>> similar to the way it is done on AM335x? If yes, then instead of adding >>>> a dummy clock node and doing the TBCLK enable as part of init, why not >>>> model TBCLK in clock tree even on DA850? >>> >>> >>> TBCLK enabling should done from platform specific way. In DA850 it is done at >>> CFGCHIP1 register. Unfortunately Davinci clock frame work will support only >>> clock nodes inside PLLC and PSC modules. Handling of CFGCHP1 require >> >> That's true at the moment, but that can be fixed. > > I will check. For an example of non-PLL non-PSC clock on davinci, you can look at cdce clock registration in board-dm646x-evm.c > >> >>> modifications in clock frame work. >>> >>> Hence handling it as part of initialization. >> >> I am curious as to how this clock is handled in am335x. I searched for >> tbclk in arch/arm/ of linux-next but could not find any references. >> Where should I be looking? > > Patch is submitted. This patch is not in Paul's tree. > > [PATCH v2] ARM: AM33XX: clk: Add clock node for EHRPWM TBCLK > https://patchwork.kernel.org/patch/2127581/ Thanks! ~Sekhar
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c index 6b7a0a2..72466ab 100644 --- a/arch/arm/mach-davinci/da8xx-dt.c +++ b/arch/arm/mach-davinci/da8xx-dt.c @@ -19,6 +19,7 @@ #include <mach/da8xx.h> #define DA8XX_NUM_UARTS 3 +#define DA8XX_EHRPWM_TBCLKSYNC BIT(12) void __init da8xx_uart_clk_enable(void) { @@ -47,10 +48,24 @@ struct of_dev_auxdata da850_auxdata_lookup[] __initdata = { static void __init da850_init_machine(void) { + struct device_node *ehrpwm_np; + const char *ehrpwm_compat = "ti,da850-ehrpwm"; + void __iomem *cfg_chip1_base; + + cfg_chip1_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG); + of_platform_populate(NULL, of_default_bus_match_table, da850_auxdata_lookup, NULL); da8xx_uart_clk_enable(); + + for_each_compatible_node(ehrpwm_np, NULL, ehrpwm_compat) + if (of_device_is_available(ehrpwm_np)) { + /* Enable TBCLK synchronization for EHRWPM modules */ + writel(readl(cfg_chip1_base) | DA8XX_EHRPWM_TBCLKSYNC, + cfg_chip1_base); + break; + } } static const char *da850_boards_compat[] __initdata = { diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index de439b7..be77ce2 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -55,6 +55,7 @@ extern unsigned int da850_max_speed; #define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x)) #define DA8XX_JTAG_ID_REG 0x18 #define DA8XX_CFGCHIP0_REG 0x17c +#define DA8XX_CFGCHIP1_REG 0x180 #define DA8XX_CFGCHIP2_REG 0x184 #define DA8XX_CFGCHIP3_REG 0x188
da850 platforms require TBCLK synchronization in CFG_CHIP1 register for TBCLK enable in EHRPWM modules. Enabling of TBCLK is done only if EHRPWM DT node status is set to "okay" DT blob. Also adds macro definitions for DA8XX_EHRPWM_TBCLKSYNC and DA8XX_CFGCHIP1_REG. Signed-off-by: Philip Avinash <avinashphilip@ti.com> --- :100644 100644 6b7a0a2... 72466ab... M arch/arm/mach-davinci/da8xx-dt.c :100644 100644 de439b7... be77ce2... M arch/arm/mach-davinci/include/mach/da8xx.h arch/arm/mach-davinci/da8xx-dt.c | 15 +++++++++++++++ arch/arm/mach-davinci/include/mach/da8xx.h | 1 + 2 files changed, 16 insertions(+)