From patchwork Sun Mar 17 18:19:45 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tanmay Upadhyay X-Patchwork-Id: 2284221 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 975C3E00DD for ; Sun, 17 Mar 2013 18:23:05 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UHIBm-0002fN-Nb; Sun, 17 Mar 2013 18:20:10 +0000 Received: from out04.sjc.mx.trendmicro.com ([216.99.131.8]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UHIBf-0002ch-Nn for linux-arm-kernel@lists.infradead.org; Sun, 17 Mar 2013 18:20:05 +0000 Received: from relay07.sjc.mx.trendmicro.com (unknown [10.30.239.130]) by out04.sjc.mx.trendmicro.com (Postfix) with ESMTP id 05C2058C4D5; Sun, 17 Mar 2013 18:20:02 +0000 (UTC) Received: from us.einfochips.com (unknown [174.123.40.210]) by relay07.sjc.mx.trendmicro.com (Postfix) with ESMTP id 96756980417; Sun, 17 Mar 2013 18:20:01 +0000 (UTC) Received: by us.einfochips.com (Postfix, from userid 101) id BB5206500036; Sun, 17 Mar 2013 13:04:25 -0500 (CDT) Received: from localhost.localdomain (cpe-70-124-85-237.austin.res.rr.com [70.124.85.237]) by us.einfochips.com (Postfix) with ESMTPA id 938CA6500014; Sun, 17 Mar 2013 13:04:24 -0500 (CDT) From: Tanmay Upadhyay To: zhangfei.gao@marvell.com, dwang4@marvell.com, njun@marvell.com, wuqm@marvell.com, prakity@marvell.com Subject: [PATCH v2 3/4] mmc: sdhci-pxa: Add SDHCI driver for PXA16x Date: Sun, 17 Mar 2013 13:19:45 -0500 Message-Id: <1363544385-3798-1-git-send-email-tanmay.upadhyay@einfochips.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1363544206-3671-1-git-send-email-tanmay.upadhyay@einfochips.com> References: <1363544206-3671-1-git-send-email-tanmay.upadhyay@einfochips.com> X-Copyrighted-Material: Please visit www.company.com/privacy.htm X-TM-AS-Product-Ver: IMHS-1.0.0.1393-7.0.0.1014-19726.001 X-TM-AS-Result: No--0.7652-5.0-31-10 X-TM-AS-Result-Detail: Spam:No-Score:-0.7652-Baseline:ModeratelyHigh-Other:Lowest X-TMASE-MatchedRID: E1/fkK/JzeuvVT6bfkFW/rGj3LN0+Ey9c3ewuwbSaG5q1Zuz1uJuCCzy bVqWyY2N8UOshdcRzO64a9qslt/AeynPugGsN3p54pdq9sdj8LVOGffsUU/kDRS11FlOYRohRtU L4XifTnummORNA9nt9XOD6P+IO44ipe9UfW7+nkKJQ9k+Ypk5CWjdirk8LAsCULzpjrEhojpS1j 8GcksWFM3Y9+YurzJQ/DiYdQI/DNITv1AH/7pVacwMJWfMNFBgIXYus8ZZZtYLbyBimgupdIu3t dAXbWvtcrX2yaJcE9klRjNRoML6wc0IsdglIVTFkxIExNA2JIA6En2bnefhoNqCxkzSpW/XvlGU c4uIqVAR0Drgif4OA8DWvzc13LsTZFRqrQuuReEURSScn+QSXqumUPO+WS4UxEHRux+uk8hxKpv EGAbTDuWNtNf4svqcEVavMwKEdo0x4+kHmReknpDMhq3P2Q5a3ihxKQLE9EH5lxqc6SJZo1pxgv nTWWgvRsJFTn1MTAMHEjqcV0FQ3IK+pasWyF5Rwt7TMGN5mtsVA4/nYFEFckxOwqPXyr98 X-TM-Deliver-Signature: ce252de3921119e12eca9daa93deb654 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130317_142004_038100_ADF55168 X-CRM114-Status: GOOD ( 29.99 ) X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [216.99.131.8 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 1.7 MIME_BASE64_TEXT RAW: Message text disguised using base64 encoding Cc: cjb@laptop.org, linux-mmc@vger.kernel.org, Tanmay Upadhyay , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org PXA16x devices uses SDHCI controller v1. As it's not much different than v2 controller, v1 driver is merged with sdhci-pxav2 driver v2 - instead of having separate file sdhci-pxav1, merge code with sdhci-pxav2 driver code as suggested by Chris Ball Signed-off-by: Philip Rakity Signed-off-by: Tanmay Upadhyay --- drivers/mmc/host/Kconfig | 7 ++++--- drivers/mmc/host/sdhci-pxav2.c | 30 +++++++++++++++++++++++++++++- drivers/mmc/host/sdhci.c | 3 +++ drivers/mmc/host/sdhci.h | 1 + include/linux/platform_data/pxa_sdhci.h | 2 ++ 5 files changed, 39 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index e5faed8..875e2475 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -207,14 +207,15 @@ config MMC_SDHCI_PXAV3 If unsure, say N. config MMC_SDHCI_PXAV2 - tristate "Marvell PXA9XX SD Host Controller support (PXAV2)" + tristate "Marvell PXA16X/PXA9XX SD Host Controller support (PXAV1/V2)" depends on CLKDEV_LOOKUP select MMC_SDHCI select MMC_SDHCI_PLTFM default y if CPU_PXA910 + default y if CPU_PXA168 help - This selects the Marvell(R) PXAV2 SD Host Controller. - If you have a PXA9XX platform with SD Host Controller + This selects the Marvell(R) PXAV1/V2 SD Host Controller. + If you have a PXA16X or PXA9XX platform with SD Host Controller and a card slot, say Y or M here. If unsure, say N. diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index ac854aa..5af7d46 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -30,6 +30,7 @@ #include #include #include +#include #include "sdhci.h" #include "sdhci-pltfm.h" @@ -75,7 +76,13 @@ static void pxav2_set_private_registers(struct sdhci_host *host, u8 mask) writew(tmp, host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP); } - if (pdata && (pdata->flags & PXA_FLAG_ENABLE_CLOCK_GATING)) { + if (pdata && pdata->pxav1_controller) { + /* no clock gating */ + tmp = readw(host->ioaddr + SD_FIFO_PARAM); + tmp |= DIS_PAD_SD_CLK_GATE; + writew(tmp, host->ioaddr + SD_FIFO_PARAM); + } else if (pdata && (pdata->flags + & PXA_FLAG_ENABLE_CLOCK_GATING)) { tmp = readw(host->ioaddr + SD_FIFO_PARAM); tmp &= ~CLK_GATE_SETTING_BITS; writew(tmp, host->ioaddr + SD_FIFO_PARAM); @@ -118,6 +125,20 @@ static u32 pxav2_get_max_clock(struct sdhci_host *host) return clk_get_rate(pltfm_host->clk); } +/* + * we cannot talk to controller for 8 bus cycles according to sdio spec + * at lowest speed this is 100,000 HZ per cycle or 800,000 cycles + * which is quite a LONG TIME on a fast cpu -- so delay if needed + */ +static void platform_specific_completion(struct sdhci_host *host) +{ + struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc)); + struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; + + if (host->clock < 3200000 && pdata && pdata->delay_in_ms) + mdelay(pdata->delay_in_ms); +} + static struct sdhci_ops pxav2_sdhci_ops = { .get_max_clock = pxav2_get_max_clock, .platform_reset_exit = pxav2_set_private_registers, @@ -218,6 +239,13 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) if (pdata->flags & PXA_FLAG_SD_8_BIT_CAPABLE_SLOT) host->mmc->caps |= MMC_CAP_8_BIT_DATA; + if (pdata->pxav1_controller) { + host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ + | SDHCI_QUIRK_32BIT_DMA_SIZE; + pxav2_sdhci_ops.platform_specific_completion + = platform_specific_completion; + } + if (pdata->quirks) host->quirks |= pdata->quirks; if (pdata->host_caps) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 6f0bfc0..430eabd 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1001,6 +1001,9 @@ static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) mdelay(1); } + if (host->ops->platform_specific_completion) + host->ops->platform_specific_completion(host); + mod_timer(&host->timer, jiffies + 10 * HZ); host->cmd = cmd; diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index a6d69b7..ef2efd3 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -282,6 +282,7 @@ struct sdhci_ops { void (*platform_resume)(struct sdhci_host *host); void (*adma_workaround)(struct sdhci_host *host, u32 intmask); void (*platform_init)(struct sdhci_host *host); + void (*platform_specific_completion)(struct sdhci_host *host); }; #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS diff --git a/include/linux/platform_data/pxa_sdhci.h b/include/linux/platform_data/pxa_sdhci.h index 27d3156..865a578 100644 --- a/include/linux/platform_data/pxa_sdhci.h +++ b/include/linux/platform_data/pxa_sdhci.h @@ -54,6 +54,8 @@ struct sdhci_pxa_platdata { unsigned int quirks; unsigned int quirks2; unsigned int pm_caps; + bool pxav1_controller; /* set if pxa168 */ + unsigned int delay_in_ms; }; struct sdhci_pxa {