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[178.255.168.63]) by mx.google.com with ESMTPS id fv2sm22570466wib.6.2013.03.25.06.53.33 (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Mon, 25 Mar 2013 06:53:33 -0700 (PDT) From: Michal Simek To: linux-arm-kernel@lists.infradead.org, monstr@monstr.eu, Josh Cartwright , Steffen Trumtrar Subject: [PATCH 02/10] arm: zynq: Move timer to clocksource interface Date: Mon, 25 Mar 2013 14:53:08 +0100 Message-Id: <1364219596-4954-2-git-send-email-michal.simek@xilinx.com> X-Mailer: git-send-email 1.7.9.7 In-Reply-To: <1364219596-4954-1-git-send-email-michal.simek@xilinx.com> References: <1364219596-4954-1-git-send-email-michal.simek@xilinx.com> X-Gm-Message-State: ALoCoQnHILfcpZZVHdcVRqGQcHmaVr39i1vvlIE6bb4cWq/56kHgg1TPCMTicRp9D92fPd9Xc2/B X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130325_095336_477818_8250D69C X-CRM114-Status: GOOD ( 13.11 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.53 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Use clocksource timer initialization. Signed-off-by: Michal Simek --- arch/arm/mach-zynq/common.c | 2 +- arch/arm/mach-zynq/common.h | 2 -- arch/arm/mach-zynq/timer.c | 27 ++++++++------------------- 3 files changed, 9 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 76493b0..68e0907 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -78,7 +78,7 @@ static void __init xilinx_zynq_timer_init(void) xilinx_zynq_clocks_init(slcr); - xttcps_timer_init(); + clocksource_of_init(); } /** diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h index 8b4dbba..5050bb1 100644 --- a/arch/arm/mach-zynq/common.h +++ b/arch/arm/mach-zynq/common.h @@ -17,6 +17,4 @@ #ifndef __MACH_ZYNQ_COMMON_H__ #define __MACH_ZYNQ_COMMON_H__ -void __init xttcps_timer_init(void); - #endif diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index 896ba3e..3b1faed 100644 --- a/arch/arm/mach-zynq/timer.c +++ b/arch/arm/mach-zynq/timer.c @@ -22,7 +22,6 @@ #include #include #include -#include "common.h" /* * This driver configures the 2 16-bit count-up timers as follows: @@ -387,11 +386,17 @@ static void __init zynq_ttc_setup_clockevent(struct clk *clk, * Initializes the timer hardware and register the clock source and clock event * timers with Linux kernal timer framework */ -static void __init xttcps_timer_init_of(struct device_node *timer) +static void __init xttcps_timer_init(struct device_node *timer) { unsigned int irq; void __iomem *timer_baseaddr; struct clk *clk; + static int initialized; + + if (initialized) + return; + + initialized = 1; /* * Get the 1st Triple Timer Counter (TTC) block from the device tree @@ -422,20 +427,4 @@ static void __init xttcps_timer_init_of(struct device_node *timer) pr_info("%s #0 at %p, irq=%d\n", timer->name, timer_baseaddr, irq); } - -void __init xttcps_timer_init(void) -{ - const char * const timer_list[] = { - "xlnx,ttc", - NULL - }; - struct device_node *timer; - - timer = of_find_compatible_node(NULL, NULL, timer_list[0]); - if (!timer) { - pr_err("ERROR: no compatible timer found\n"); - BUG(); - } - - xttcps_timer_init_of(timer); -} +CLOCKSOURCE_OF_DECLARE(zynq, "xlnx,ttc", xttcps_timer_init);