From patchwork Sun Mar 31 13:54:23 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 2368441 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id A84C63FC8C for ; Sun, 31 Mar 2013 13:59:07 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UMIjy-0003wO-85; Sun, 31 Mar 2013 13:56:10 +0000 Received: from mail-ee0-f48.google.com ([74.125.83.48]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UMIjv-0003w5-CN for linux-arm-kernel@lists.infradead.org; Sun, 31 Mar 2013 13:56:08 +0000 Received: by mail-ee0-f48.google.com with SMTP id b15so775057eek.21 for ; Sun, 31 Mar 2013 06:56:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:mime-version:content-type:content-transfer-encoding; bh=iFVc7KhN51YBzbSrG+8n7g4zmEkckKVzZ9j86+m2wJo=; b=YITKP5Rqpn3fGOcyM4+X/LVW3Bsa+zxRXtYbnPXXa0/DunHc6QlP4ja6/eioqLYgBo 7hEMk8xzJVAPPPxAk38oyB2x9GljDLYRCnH1YWckwdyFQsT8ZAxrNEfSo/2nYzWl2rWm BE42AB3oA3GrIj+7LH5ERALAJcDSndCfi/CCjILccrD3tS8TDhZjtwMZEmqiq5T//ftg vqHFt13Ts2HBnOcMoTZSFWOO1IX/+8AlMGjLGb5xQ6Td+0na1Obi86ajh9Oi0f3HUMyw whzXYWlGvYc2izaAcyvMJ1PuQKmqfPDbg0tiT8g8UGzsI/WwV51QNupCM13s/AFV+wNd G6iw== X-Received: by 10.14.210.132 with SMTP id u4mr27667342eeo.19.1364738165519; Sun, 31 Mar 2013 06:56:05 -0700 (PDT) Received: from Pali-EliteBook.kolej.mff.cuni.cz (pali.kolej.mff.cuni.cz. [78.128.193.202]) by mx.google.com with ESMTPS id d47sm15683850eem.9.2013.03.31.06.56.03 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 31 Mar 2013 06:56:04 -0700 (PDT) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Tony Lindgren Subject: [PATCH] RX-51: ARM errata 430973 workaround Date: Sun, 31 Mar 2013 15:54:23 +0200 Message-Id: <1364738063-23868-1-git-send-email-pali.rohar@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <20130328155803.GT10155@atomide.com> References: <20130328155803.GT10155@atomide.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130331_095607_694504_D9AC250D X-CRM114-Status: GOOD ( 22.64 ) X-Spam-Score: -1.0 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 1.7 KHOP_BIG_TO_CC Sent to 10+ recipients instaed of Bcc or a list 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (pali.rohar[at]gmail.com) -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.83.48 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Nishanth Menon , linux@arm.linux.org.uk, Aaro Koskinen , Peter De Schrijver , linux-kernel@vger.kernel.org, Ivaylo Dimitrov , Santosh Shilimkar , Pavel Machek , =?UTF-8?q?Pali=20Roh=C3=A1r?= , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Closed and signed Nokia X-Loader bootloader stored in RX-51 nand does not set IBE bit in ACTLR and starting kernel in non-secure mode. So direct write to ACTLR by our kernel does not working and the code for ARM errata 430973 in commit 7ce236fcd6fd45b0441a2d49acb2ceb2de2e8a47 that sets IBE bit is a noop. In order to have workaround for ARM errata 430973 from non-secure world on RX-51 we needs Secure Monitor Call to set IBE BIT in ACTLR. This patch adds RX-51 specific SMC support and sets IBE bit in ACTLR during board init code for ARM errata 430973 workaround. Because all the setup and what arguments are required for SMC are completely different from SoC to SoC it is not possible to create generic SMC handling. Code in omap-smc.S looks identical but it is not. So RX-51 needs another code. ARM errata 430973 workaround is needed for thumb-2 ISA compiled userspace binaries. Without this workaround thumb-2 binaries crashing. So with this patch it is possible to recompile and run applications/binaries with thumb-2 ISA on RX-51. Signed-off-by: Ivaylo Dimitrov Signed-off-by: Pali Rohár --- arch/arm/mach-omap2/Makefile | 1 + arch/arm/mach-omap2/board-rx51-secure.c | 66 +++++++++++++++++++++++++++++++ arch/arm/mach-omap2/board-rx51-secure.h | 36 +++++++++++++++++ arch/arm/mach-omap2/board-rx51-smc.S | 34 ++++++++++++++++ arch/arm/mach-omap2/board-rx51.c | 7 ++++ 5 files changed, 144 insertions(+) create mode 100644 arch/arm/mach-omap2/board-rx51-secure.c create mode 100644 arch/arm/mach-omap2/board-rx51-secure.h create mode 100644 arch/arm/mach-omap2/board-rx51-smc.S diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 37c4e09..cc4665d 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -244,6 +244,7 @@ obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o sdram-nokia.o obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-peripherals.o obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-video.o obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-camera.o +obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-smc.o board-rx51-secure.o obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom.o board-zoom-peripherals.o obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom-display.o obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom-debugboard.o diff --git a/arch/arm/mach-omap2/board-rx51-secure.c b/arch/arm/mach-omap2/board-rx51-secure.c new file mode 100644 index 0000000..361dc78 --- /dev/null +++ b/arch/arm/mach-omap2/board-rx51-secure.c @@ -0,0 +1,66 @@ +/* + * RX51 Secure PPA API. + * + * Copyright (C) 2012 Ivaylo Dimitrov + * + * + * This program is free software,you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include + +#include "board-rx51-secure.h" + +/** + * rx51_secure_dispatcher: Routine to dispatch secure PPA API calls + * @idx: The PPA API index + * @flag: The flag indicating criticality of operation + * @nargs: Number of valid arguments out of four. + * @arg1, arg2, arg3 args4: Parameters passed to secure API + * + * Return the non-zero error value on failure. + */ +u32 rx51_secure_dispatcher(u32 idx, u32 flag, u32 nargs, u32 arg1, u32 arg2, + u32 arg3, u32 arg4) +{ + u32 ret; + u32 param[5]; + + param[0] = nargs+1; + param[1] = arg1; + param[2] = arg2; + param[3] = arg3; + param[4] = arg4; + + /* + * Secure API needs physical address + * pointer for the parameters + */ + flush_cache_all(); + outer_clean_range(__pa(param), __pa(param + 5)); + ret = rx51_ppa_smc(idx, flag, __pa(param)); + + return ret; +} + +/** + * rx51_secure_update_aux_cr: Routine to modify the contents of Auxiliary Control Register + * @set_bits: bits to set in ACR + * @clr_bits: bits to clear in ACR + * + * Return the non-zero error value on failure. +*/ +u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits) +{ + u32 acr; + + /* Read ACR */ + asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr)); + acr &= ~clear_bits; + acr |= set_bits; + + return rx51_secure_dispatcher(RX51_PPA_WRITE_ACR, + FLAG_START_CRITICAL, + 1,acr,0,0,0); +} diff --git a/arch/arm/mach-omap2/board-rx51-secure.h b/arch/arm/mach-omap2/board-rx51-secure.h new file mode 100644 index 0000000..61c760b --- /dev/null +++ b/arch/arm/mach-omap2/board-rx51-secure.h @@ -0,0 +1,36 @@ +/* + * board-rx51-secure.h: OMAP Secure infrastructure header. + * + * Copyright (C) 2012 Ivaylo Dimitrov + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef OMAP_RX51_SECURE_H +#define OMAP_RX51_SECURE_H + +/* HAL API error codes */ +#define API_HAL_RET_VALUE_OK 0x00 +#define API_HAL_RET_VALUE_FAIL 0x01 + +/* Secure HAL API flags */ +#define FLAG_START_CRITICAL 0x4 +#define FLAG_IRQFIQ_MASK 0x3 +#define FLAG_IRQ_ENABLE 0x2 +#define FLAG_FIQ_ENABLE 0x1 +#define NO_FLAG 0x0 + +/* Secure PPA(Primary Protected Application) APIs */ +#define RX51_PPA_L2_INVAL 40 +#define RX51_PPA_WRITE_ACR 42 + +#ifndef __ASSEMBLER__ + +extern u32 rx51_secure_dispatcher(u32 idx, u32 flag, u32 nargs, + u32 arg1, u32 arg2, u32 arg3, u32 arg4); +extern u32 rx51_ppa_smc(u32 id, u32 flag, u32 pargs); + +extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits); +#endif /* __ASSEMBLER__ */ +#endif /* OMAP_RX51_SECURE_H */ diff --git a/arch/arm/mach-omap2/board-rx51-smc.S b/arch/arm/mach-omap2/board-rx51-smc.S new file mode 100644 index 0000000..70e2eb7 --- /dev/null +++ b/arch/arm/mach-omap2/board-rx51-smc.S @@ -0,0 +1,34 @@ +/* + * RX51 secure APIs file. + * + * Copyright (C) 2012 Ivaylo Dimitrov + * + * + * This program is free software,you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +/** + * u32 rx51_ppa_smc(u32 id, u32 flag, u32 pargs) + * Low level common routine for secure HAL and PPA APIs. + * @id: Secure Service ID + * @flag: Flag to indicate the criticality of operation + * @pargs: Physical address of parameter list starting + * with number of parametrs + */ +ENTRY(rx51_ppa_smc) + .arch_extension sec + stmfd sp!, {r4-r12, lr} + mov r12, r0 @ Copy the secure service ID + mov r3, r2 @ Copy the pointer to va_list in R3 + mov r2, r1 @ Copy the flags in R2 + mov r1, #0x0 @ Process ID - 0 + mov r6, #0xff @ Indicate new Task call + dsb + dmb + smc #1 @ call PPA service + ldmfd sp!, {r4-r12, pc} +ENDPROC(rx51_ppa_smc) diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 03663c2..74f83a5 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -32,6 +32,7 @@ #include "gpmc.h" #include "pm.h" #include "sdram-nokia.h" +#include "board-rx51-secure.h" #define RX51_GPIO_SLEEP_IND 162 @@ -105,6 +106,12 @@ static void __init rx51_init(void) rx51_peripherals_init(); rx51_camera_init(); +#ifdef CONFIG_ARM_ERRATA_430973 + printk(KERN_INFO "RX-51: Enabling ARM errata 430973 workaround.\n"); + /* set IBE to 1 */ + rx51_secure_update_aux_cr(1 << 6, 0); +#endif + /* Ensure SDRC pins are mux'd for self-refresh */ omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);