From patchwork Tue Apr 2 11:19:41 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joseph Lo X-Patchwork-Id: 2377031 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 5A5D13FDDA for ; Tue, 2 Apr 2013 11:22:40 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UMzGH-0006z2-Sl; Tue, 02 Apr 2013 11:20:21 +0000 Received: from hqemgate03.nvidia.com ([216.228.121.140]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UMzFw-0006s7-A9 for linux-arm-kernel@lists.infradead.org; Tue, 02 Apr 2013 11:20:01 +0000 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Tue, 02 Apr 2013 04:25:35 -0700 Received: from hqemhub01.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Tue, 02 Apr 2013 04:19:15 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 02 Apr 2013 04:19:15 -0700 Received: from jlo-ubuntu-64.nvidia.com (172.20.144.16) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server (TLS) id 8.3.298.1; Tue, 2 Apr 2013 04:19:57 -0700 From: Joseph Lo To: Stephen Warren Subject: [PATCH V3 1/3] ARM: tegra: get PMC clock source from DT Date: Tue, 2 Apr 2013 19:19:41 +0800 Message-ID: <1364901583-24867-2-git-send-email-josephl@nvidia.com> X-Mailer: git-send-email 1.8.2 In-Reply-To: <1364901583-24867-1-git-send-email-josephl@nvidia.com> References: <1364901583-24867-1-git-send-email-josephl@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130402_072000_548063_DD47FEB3 X-CRM114-Status: GOOD ( 15.62 ) X-Spam-Score: -9.2 (---------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-9.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [216.228.121.140 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -2.3 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Joseph Lo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Adding the bindings of the clock source of PMC in DT. And getting the clock from DT. Signed-off-by: Joseph Lo --- V3: * add binding document for the clock source of PMC * get the clock from DT by of_get_clk_by_name() * fix WARN_ON_ONCE to WARN_ON when there is no clock define in DT V2: * new in this series --- .../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 23 ++++++++++++++++++++++ arch/arm/mach-tegra/common.c | 2 +- arch/arm/mach-tegra/pmc.c | 4 ++++ 3 files changed, 28 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt index b5846e2..1cb8f6b 100644 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt @@ -9,11 +9,34 @@ Properties: signal is fed into the PMC. This signal is optionally inverted, and then fed into the ARM GIC. The PMC is not involved in the detection or handling of this interrupt signal, merely its inversion. +- clocks : the source clock of PMC +- clock-names : the name of source clock of PMC Example: +/ SoC dts including file pmc@7000f400 { compatible = "nvidia,tegra20-pmc"; reg = <0x7000e400 0x400>; nvidia,invert-interrupt; + clocks = <&tegra_car 110>, <&clk32k_in>; + clock-names = "pclk", "clk32k_in"; }; + +/ Tegra board dts file +{ + ... + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock@0 { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + ... +} diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index f0315c9..b02ebe7 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -61,6 +61,7 @@ u32 tegra_uart_config[4] = { void __init tegra_dt_init_irq(void) { tegra_clocks_init(); + tegra_pmc_init(); tegra_init_irq(); irqchip_init(); } @@ -100,7 +101,6 @@ void __init tegra_init_early(void) tegra_apb_io_init(); tegra_init_fuse(); tegra_init_cache(); - tegra_pmc_init(); tegra_powergate_init(); tegra_hotplug_init(); } diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c index b30e921..dbe2577 100644 --- a/arch/arm/mach-tegra/pmc.c +++ b/arch/arm/mach-tegra/pmc.c @@ -19,6 +19,7 @@ #include #include #include +#include #define PMC_CTRL 0x0 #define PMC_CTRL_INTR_LOW (1 << 17) @@ -43,6 +44,7 @@ static DEFINE_SPINLOCK(tegra_powergate_lock); static void __iomem *tegra_pmc_base; static bool tegra_pmc_invert_interrupt; +static struct clk *tegra_pclk; static inline u32 tegra_pmc_readl(u32 reg) { @@ -151,6 +153,8 @@ static void tegra_pmc_parse_dt(void) tegra_pmc_invert_interrupt = of_property_read_bool(np, "nvidia,invert-interrupt"); + tegra_pclk = of_clk_get_by_name(np, "pclk"); + WARN_ON(IS_ERR(tegra_pclk)); } void __init tegra_pmc_init(void)